3D DRAM to see clear development direction in next 2-3 years

Amy Fan, Taipei; Willis Ke, DIGITIMES Asia 0

Credit: AFP

Samsung Electronics and SK Hynix have revealed the latest development trends for advanced logic chips technology and memory products at recent technology symposiums, with the former stating that it will continue to integrate advanced processes based on GAA (gate-all-around) transistor structure to achieve further progress and the latter predicting that a more clear development direction for 3D DRAM will emerge in the next 2-3 years.

According to reports from Korea's ET News and The Elec, Samsung representatives at semiconductor technology conferences held in Seoul in May and June indicated that semiconductor logic component technology has evolved from planar FET (field-effect transistor) to 3D FinFET and GAAFET structures, and GAA technology will serve as the foundation, aligning with 2D and 3D technologies for continuous evolution.

Samsung is continuously incorporating GAA technology for sub-3nm chip production to overcome the limitations of semiconductor miniaturization. In 2022, the company took the lead to usher in the era of 3nm technology and initiated the paradigm shift from FinFET to GAAFET, aiming to accelerate the development of heterogeneous integration in packaging and achieve technology leadership in the foundry arena.

Koran media reports pointed out that the ultimate goal of Samsung's GAA technology development is to narrow its technology gap with TSMC. Pioneering the adoption of GAA technology for its 3nm chip production, Samsung is eager to minimize its tech lag behind TSMC, hoping to be on a par with the foundry giant in the upcoming 2nm process era and even overtake it.

Samsung plans to mass produce the second-generation 3nm GAA in 2024 and 2nm GAA in 2025, with its second-generation 3nm GAA technology reportedly already tested by chip customers. Samsung officials said that key challenges in the future GAA technology development will include bonding technology, layer-by-layer lamination technology and cost rationalization.

In terms of memory development trends, SK Hynix officials predicted that memory technology will evolve from HBM (high bandwidth memory) to PIM (processing-in-memory) and CIM (computing-in-memory). They noted that when highly intelligent AI emerges, the amount of data collected and processed by autonomous vehicles will experience explosive growth, prompting semiconductor technology to evolve further to meet the demands.

SK Hynix has just announced its mass production of 238-layer 3D NAND, and reportedly intends to proceed with the development of technologies surpassing 300 layers. The company has frequently stressed that only though continuous expansion of innovative technologies such as PIM and CIM can memory makers stay competitive in the industry.

Additionally, in the field of DRAM, there have also been challenges in chip scaling technology. To overcome them, new platforms like 3D DRAM are needed along with innovations in patterning, cell capacitance and low-resistance wiring. Pattering innovation involves the use of High-NA EUV equipment, while breakthroughs in the field of materials are required for improving cell capacitance and low-resistance wiring, according to SK Hynix officials.

They noted the concept of 3D DRAM is similar to that of 3D NAND, aiming to improve performance and space efficiency through stacking. However, 3D DRAM is still in its early stage of development and its technical concepts are not finalized yet, but concrete development directions will emerge in the next 2-3 years.