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NEWS TAGGED DRAM
Wednesday 30 September 2026
'I tell myself every day it'll ease': Phison CEO sees years of memory shortage
Phison Electronics CEO Pua Khein-Seng says he tells himself every day that the memory shortage will ease tomorrow. In reality, he says, AI-driven demand has opened a gap between memory...
Wednesday 30 September 2026
SK Hynix resumes DDR4, DDR5 packaging orders with Winpac
SK Hynix has resumed outsourcing DRAM packaging to South Korean outsourced semiconductor assembly and test (OSAT) provider Winpac, reviving a supplier relationship that ended in 2023...
Wednesday 30 September 2026
Column: Memory and logic collide as AI shifts the balance
As HBM approaches half the cost of a GPU-HBM CoWoS package, can memory still be viewed as merely a passive component of AI computing? The answer goes back to the "memory wall," a challenge...
Wednesday 30 September 2026
Commentary: What risks does China's DRAM capacity face amid tightening market?
China's continued expansion of DRAM capacity has raised a key question for the global memory market: will supply and demand flip?
Wednesday 30 September 2026
CXMT's US$5.2 billion buildout deepens China's push for domestic DRAM equipment
China's largest dynamic random-access memory (DRAM) maker ChangXin Memory Technologies (CXMT) is accelerating a CNY34.9 billion (US$5.2 billion) expansion aimed at chipmaking equipment,...
Wednesday 30 September 2026
CXMT expansion meets surging GigaDevice DRAM demand, sharpening China's memory supply-chain buildout
CXMT's continued DRAM capacity expansion is coinciding with stronger demand from China's domestic memory sector.
Wednesday 30 September 2026
Inside China's 3D DRAM push: from lab to fab, and the road ahead
China's push into 3D DRAM is moving from early-stage research into wafer processes and equipment, with efforts spanning the Institute of Microelectronics of the Chinese Academy of...
Tuesday 29 September 2026
CXMT to spend US$5.2 billion on R&D and testing as DRAM supply stays tight
China's ChangXin Memory Technologies (CXMT) plans to invest CNY34.9 billion (approx. US$5.2 billion) in technology R&D and additional back-end DRAM testing capacity, stepping up...
Tuesday 29 September 2026
Samsung reshuffles DRAM roadmap, prioritizing B1b hybrid bonding for D0a, HBM5
Samsung Electronics is reshaping its next-generation dynamic random-access memory (DRAM) roadmap, elevating its B1b wafer-to-wafer (W2W) hybrid bonding technology from a project-specific...
Tuesday 29 September 2026
SK Hynix tests HBM5 with TSMC as HBM4 enters Nvidia's next platform

SK Hynix has validated its HBM5 memory with TSMC's CoWoS packaging, the company said in a September 28 post on its corporate newsroom...

Tuesday 29 September 2026
HBM to take nearly 30% of DRAM capacity as Samsung speeds up P5
High-bandwidth memory (HBM) is expected to account for nearly 30% of DRAM makers' total wafer capacity in 2027, up from about 20% currently, as Samsung Electronics moves to accelerate...
Monday 28 September 2026
Weekly news roundup: China gains ground in memory and AI hardware as supply stays tight
China's AI sector is shifting from catch-up to commercialization, with value concentrating in hardware bottlenecks and large platforms rather than independent model labs. Across memory,...
Saturday 26 September 2026
Acer, Phison split on DRAM outlook as PC memory supply eases
Acer and Phison Electronics are offering sharply different readings of the DRAM market as supply conditions improve for mainstream PC memory while AI and server demand keep the broader...
Thursday 24 September 2026
CXMT gains ground in DRAM as Samsung, SK Hynix shift more capacity to HBM
China's ChangXin Memory Technologies (CXMT) is gaining ground in the global DRAM market as Samsung Electronics and SK Hynix allocate more production capacity to high-bandwidth memory...
Thursday 24 September 2026
Samsung reportedly shifts sub-10nm DRAM roadmap toward hybrid bonding
Samsung Electronics has reportedly revised the roadmap for its first sub-10nm DRAM generation, making a wafer-to-wafer hybrid-bonding architecture the baseline for its D0a process...