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Japan chip development policy highlights security and revitalization

Chiang, Jen-Chieh, Taipei; Willis Ke, DIGITIMES Asia 0

Credit: AFP

The Japanese government has set its semiconductor development policy based on two major principles - security and revitalization, shifting from relying entirely on domestic companies for chip development to introducing foreign technology and strengthening cross-country cooperation.

With the policy change, its Ministry of Economy, Trade and Industry (METI) moved in 2021 to attract TSMC to set up a wafer fab in Kumamoto, Japan by offering substantial subsidies. The fab is set to start commercial production of 28/22nm and even 16/12 nm chips in 2024, a big jump from the best process of 40nm currently available at Japanese semiconductor fabs.

METI has also subsidized equipment investments by Kioxia and Western Digital (WD) in their joint-venture 3D NAND fab in Yokkaichi, as well as investments by Micron Technology in advanced DRAM manufacturing facilities at its plant in Hiroshima.

In May 2022, Japan's parliament ratified an economic security bill aimed at guarding technology and reinforcing critical supply chains, with half of the bill contents associated with semiconductors. In late December, the parliament resolved to appropriate JPY1 trillion (US$7.56 billion) to subsidize the development of 11 critical tech segments, with semiconductors gaining the largest chunk, at JPY368.6 billion (US$2.82 billion), of the subsidy pie.

The bill covers four major key points: ensuring the security of supply chains such as semiconductors; strengthening pre-examination of network infrastructure equipment to prevent cyberattacks; combing forces of the government and private sectors to develop advanced and critical technologies; and establishing a system of secrete patents kept within Japan to ensure technological breakthroughs are not used by other countries to develop nuclear weapons or other military equipment.

Meanwhile, METI and major business conglomerates in November 2022 jointly established Rapidus as an advanced wafer foundry and the Leading-edge Semiconductor Center (LSTC), aiming to develop mass production technology for 2nm chips in cooperation with IBM and Belgium's nano-electronics technology provider Imec, with commercial production slated to kick off in 2027 at the earliest.

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