Nvidia has placed additional orders for AI chips that require TSMC's CoWoS (chip on wafer on substrate) packaging, according to industry sources.
Nvidia has recently obtained TSMC's commitment to CoWoS support for an additional 10,000 wafers in 2023, the sources said, adding TSMC may have to give Nvidia extra CoWoS support for 1,000 to 2,000 wafers monthly throughout the rest of the year.
TMSC has a monthly CoWoS capacity of 8,000 to 9,000 wafers, and extra demand from Nvidia means the foundry's CoWoS supply will become tight, the sources said.
Nvidia is optimistic about demand for AI chips, but it needs one-stop support from TSMC for both chip manufacturing and advanced packaging, the sources said.
Meanwhile, Microsoft has teamed with AMD for AI applications, according to sources from semiconductor backend houses. The sources noted that the AI chip sector can be roughly divided into two camps: the Microsoft and non-Microsoft group. They are all relying on external or internal chip supplies to support their expansion in the AI HPC sector. And all those eyeing HPC opportunities are keen to obtain manufacturing and packaging support from TSMC, the sources said.
TSMC is optimistic about growth for its CoWoS technology.
TSMC has noted that demand for advanced packaging and testing may be slightly weaker in 2023 than in 2022, with the segment's share of overall company sales to reach 6-7% this year, slightly lower than the 7% for last year. But TSMC expects the advanced packaging and testing segment to see above-average growth in five years.
Industry sources that the variants of CoWoS, including CoWoS-S, CoWoS-R and CoWoS-L, have all received recognition from TSMC's top clients. None of the above-mentioned companies commented on the report.
Apart from AI HPC, CoWoS-S has also penetrated the high-end networking chip segment, the sources said. CoWoS-L can meet future demand for even higher computing performance and more integration of HBM.
To support the demands of HPC applications to fit more processors and memory in a single package, TSMC said it is developing solution with up to six times reticle-size (~5,000mm2) RDL interposer, capable of accommodating 12 stacks of HBM memory.