Wednesday 11 May 2016
STATS ChipPAC fan-out wafer-level packaging shipments exceed 1 billion units
STATS ChipPAC has shipped over one billion fan-out wafer level packages (FOWLP), also known in the industry as embedded wafer-level ball grid array (eWLB), according to the company...
Thursday 28 April 2016
Cypress subsidiary Deca to receive US$60 million investment from ASE
Advanced Semiconductor Engineering (ASE) and Deca Technologies, a subsidiary of Cypress Semiconductor, have announced the signing of an agreement whereby ASE will invest US$60 million...
Wednesday 16 March 2016
Cadence launches complete IC packaging design and analysis solutions for fan-out WLCSP
Cadence Design Systems has announced the availability of foundry-proven IC packaging design and analysis solutions for advanced fan-out wafer-level chip scale packaging (WLCSP) and...
Monday 18 January 2016
TSMC expects to launch 5nm node 2 years after 7nm
TSMC will be ready to roll out its 5nm process technology two years after the launch of its 7nm node, according to the pure-play foundry.
Tuesday 15 December 2015
Advanced semiconductor packaging drives materials consumption through 2019, says SEMI
The US$18 billion semiconductor packaging materials will undergo steady single-digit unit volume growth for many material segments through 2019, including laminate substrates, IC...
Friday 11 December 2015
TSMC to provide backend InFO packaging technology for Apple chips, says report
TSMC is scheduled to move its integrated fan-out (InFO) wafer-level packaging technology to volume production in the second quarter of 2016. Apple will be among the first wave of...
Wednesday 23 September 2015
Cadence offers design tools for TSMC InFO packaging
Cadence Design Systems has announced that its Allegro system-in-package (SiP) and physical verification system (PVS) implementation technologies have been enabled for TSMC's integrated...
Thursday 18 June 2015
NANIUM enables WLCSP without UBM
NANIUM S.A., a leading provider of advanced semiconductor packaging known for its innovative solutions, today announced it achieved outstanding reliability results for a Wafer-Level...
Thursday 21 May 2015
Xintec profits soar in 1Q15
Taiwan's Xintec, an affiliate of Taiwan Semiconductor Manufacturing Company (TSMC) specializing in packaging services for CMOS image sensors as well as MEMS and fingerprint sensors,...
Tuesday 5 May 2015
TSMC InFO-WLP technology to generate significant revenues starting 2016
Taiwan Semiconductor Manufacturing Company's (TSMC) backend integrated fan-out (InFO) wafer-level packaging (WLP) technology will start contributing significantly to the IC foundry's...
Tuesday 7 April 2015
Altera, TSMC develop UBM-free WLCSP packaging
Altera and TSMC have produced an UBM-free (under-bump metallization-free) WLCSP (wafer-level chip scale package) technology for Altera's MAX 10 FPGA products, according to the comp...
Tuesday 17 March 2015
Xintec 12-inch wafer-level CSP ready for volume production in 2H15, says chairman
Image sensor packaging house Xintec will have its 12-inch wafer-level chip-scale package (WL-CSP) line ready for volume production in the second half of 2015, according to company...
Wednesday 4 February 2015
TSMC to offer InFO-WLP technology for 16nm chips, eyeing Apple orders
Taiwan Semiconductor Manufacturing Company (TSMC) will have its backend integrated fan-out (InFO) wafer-level packaging (WLP) technology ready for 16nm chips, eyeing orders for Apple's...
Tuesday 23 December 2014
UTAC said to set up 12-inch wafer-level packaging line in Taiwan
United Test and Assembly Center (UTAC), a Singapore-based assembly and test company, will continue its investment in Taiwan in 2015 by setting up a 12-inch wafer-level packaging line,...
Tuesday 9 July 2013
High-end packaging next battlefield for IC assembly and test services providers, says Amkor executive
Robust growth in smartphone usage is encouraging semiconductor assembly and test services providers to head towards related packaging technologies. Amkor Technology is already among...
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