72 news items tagged wafer-level packaging
TSMC advanced packaging seen crucial for HPC chips
Tuesday 3 April 2018The InFO WLP (integrated fan-out wafer level packaging) and CoWoS (chip on wafer on substrate) developed by Taiwan Semiconductor Manufacturing Company (TSMC) have emerged as two major...
ASE expects revenues to pick up starting 2Q18
Friday 2 February 2018Advanced Semiconductor Engineering (ASE) expects its IC backend business sales to register strong sequential growth in the second quarter and grow through the fourth quarter. The...
ASE to expand WLCSP capacity at Singapore plant, sources say
Tuesday 21 November 2017In the wake of robust demand for wearable devices and automotive electronics applications, packaging and testing company Advanced Semiconductor Engineering (ASE) is set to expand...
IC packager ASE reportedly enters Amazon supply chain
Friday 15 September 2017Advanced Semiconductor Engineering (ASE) has cut into the supply chain for Amazon's datacenter construction set to begin between 2017 and 2018, by providing 2.5D IC packaging services...
SEMICON Taiwan 2017: Brewer Science showcasing innovative materials for EUV and 3D IC manufacturing
Thursday 14 September 2017With the semiconductor-manufacturing industry needing the high computing power that can only be achieved through advanced node logic and memory, as well as the heterogeneous-integration...
Nidec to acquire SV Probe
Tuesday 29 August 2017Japan-based Nidec has announced plans to acquire SV Probe, a Singapore-based probe card manufacturer, through subsidiary Nidec-Read. A stock purchase agreement has been reached between...
TSMC InFO packaging brings more competitiveness to its 7nm process technology
Thursday 20 July 2017Taiwan Semiconductor Manufacturing Company's (TSMC) integrated fan-out (InFO) wafer-level packaging technology is about to enter its second generation, which will bring more competitiveness...
Packaging can extend physical limits of semiconductors, says TSMC chair
Monday 12 June 2017Moore's Law will reach its physical limits in 8-10 years, but the development of advanced packaging technology will help extend innovations, according to Morris Chang, chairman of...
Micron talks about its integrated global operations
Wednesday 26 April 2017Micron Technology has been actively allocating its global resources to enhance its DRAM and NAND flash product lines, according to Wayne Allan, VP of global manufacturing at the US-based...
Amkor to buy fellow packaging company Nanium
Wednesday 8 February 2017Amkor Technology and Nanium, a Portugal-based IC backend house specializing in wafer-level fan-out (WLFO) packaging solutions, have entered into a definitive agreement for Amkor to...
Fujifilm to open new plant for advanced IC materials in Taiwan
Monday 14 November 2016Fujifilm has announced that its semiconductor business subsidiary, Fujifilm Electronic Materials, will launch the operation of its third plant in Taiwan in late November. The new...
ASE ready to enter volume production of fan-out wafer-level packaging
Wednesday 26 October 2016Advanced Semiconductor Engineering (ASE) has reportedly obtained orders for fan-out wafer-level packaging (FOWLP) from Qualcomm, MediaTek and HiSilicon with volume production set...
PTI buys wafer-level packaging equipment
Wednesday 28 September 2016Packaging and testing company Powertech Technology has purchased wafer-level packaging equipment from Ultratech SE Asia for NT$544 million (US$17 million), according to a company...
Applied Materials, IME to advance R&D in fan-out wafer-level packaging
Tuesday 20 September 2016Applied Materials and the Institute of Microelectronics (IME), a research institute under Singapore's Agency for Science, Technology and Research, have announced a five-year extension...
STATS ChipPAC fan-out wafer-level packaging shipments exceed 1 billion units
Wednesday 11 May 2016STATS ChipPAC has shipped over one billion fan-out wafer level packages (FOWLP), also known in the industry as embedded wafer-level ball grid array (eWLB), according to the company...
Cypress subsidiary Deca to receive US$60 million investment from ASE
Thursday 28 April 2016Advanced Semiconductor Engineering (ASE) and Deca Technologies, a subsidiary of Cypress Semiconductor, have announced the signing of an agreement whereby ASE will invest US$60 million...
Cadence launches complete IC packaging design and analysis solutions for fan-out WLCSP
Wednesday 16 March 2016Cadence Design Systems has announced the availability of foundry-proven IC packaging design and analysis solutions for advanced fan-out wafer-level chip scale packaging (WLCSP) and...
TSMC expects to launch 5nm node 2 years after 7nm
Monday 18 January 2016TSMC will be ready to roll out its 5nm process technology two years after the launch of its 7nm node, according to the pure-play foundry.
Advanced semiconductor packaging drives materials consumption through 2019, says SEMI
Tuesday 15 December 2015The US$18 billion semiconductor packaging materials will undergo steady single-digit unit volume growth for many material segments through 2019, including laminate substrates, IC...
TSMC to provide backend InFO packaging technology for Apple chips, says report
Friday 11 December 2015TSMC is scheduled to move its integrated fan-out (InFO) wafer-level packaging technology to volume production in the second quarter of 2016. Apple will be among the first wave of...
Cadence offers design tools for TSMC InFO packaging
Wednesday 23 September 2015Cadence Design Systems has announced that its Allegro system-in-package (SiP) and physical verification system (PVS) implementation technologies have been enabled for TSMC's integrated...
NANIUM enables WLCSP without UBM
Thursday 18 June 2015NANIUM S.A., a leading provider of advanced semiconductor packaging known for its innovative solutions, today announced it achieved outstanding reliability results for a Wafer-Level...
Xintec profits soar in 1Q15
Thursday 21 May 2015Taiwan's Xintec, an affiliate of Taiwan Semiconductor Manufacturing Company (TSMC) specializing in packaging services for CMOS image sensors as well as MEMS and fingerprint sensors,...
TSMC InFO-WLP technology to generate significant revenues starting 2016
Tuesday 5 May 2015Taiwan Semiconductor Manufacturing Company's (TSMC) backend integrated fan-out (InFO) wafer-level packaging (WLP) technology will start contributing significantly to the IC foundry's...
Altera, TSMC develop UBM-free WLCSP packaging
Tuesday 7 April 2015Altera and TSMC have produced an UBM-free (under-bump metallization-free) WLCSP (wafer-level chip scale package) technology for Altera's MAX 10 FPGA products, according to the comp...