Leading semiconductor companies called for stronger adoption of open chiplet standards at the OCP APAC Summit 2025 in Taipei, highlighting a growing industry consensus around modular architectures and open ecosystems as the foundation for future data center and high-performance computing infrastructure.
Industry converges on modular solutions
As AI workloads continue to escalate, traditional monolithic chip design is approaching physical and economic limits. Industry participants at the summit agreed that modular chiplet architectures offer a viable alternative—but only if built on open, interoperable standards.
In a breakout session titled "Innovations with Plug-and-Play Chiplets for Next Generation Computing using Universal Chiplet Interconnect Express (UCIe)", Debendra Das Sharma, Intel Senior Fellow and chair of the UCIe Consortium, described UCIe as an open on-package interconnect standard intended to serve as the "PCIe for chiplets." Since Intel donated the initial specification in 2022, the consortium has expanded to over 140 members, including TSMC, Nvidia, Samsung, and other key players.
MediaTek and TSMC champion open standards
The theme of ecosystem-wide collaboration was reinforced during another panel titled "Chiplet Technology in the AI Era: Opportunities and Challenges", moderated by Eric Huang, Vice President at DIGITIMES.
Credit: Joseph Chen
CK Peng, Senior Marketing Director at MediaTek, said UCIe resolves long-standing compatibility issues. "Before UCIe, your chiplet couldn't connect to my ASIC," Peng noted. "We are happy to see an open standard. More openness will drive more innovation."
Dr. Shang Y. Hou, Director of High-Performance Packaging Integration at TSMC, emphasized the manufacturing benefits of standardization. Drawing a comparison with JEDEC's HBM memory specification, Hou said that non-standard components create unnecessary complexity for foundries.
"Custom interfaces are a nightmare," he remarked, adding that TSMC is addressing these challenges through its 3DFabric Alliance and other collaborative initiatives.
Supply chain and design challenges persist
Dr. Lihong Cao, Senior Director at ASE, highlighted operational concerns that persist despite the progress in standardization.
She pointed to the need for trusted quality assurance frameworks, asking, "How do you guarantee a Known Good Die?" She also raised questions around managing supply chain security in a multi-vendor environment.
From a design perspective, Tony Lin, Vice President of Sales at Synopsys Taiwan, said the adoption of chiplet architectures demands a new generation of design tools.
He called for standardized "3D Assembly Design Kits (ADKs)" and simulation platforms that enable chiplets from different suppliers to be validated together.
While a fully interoperable chiplet ecosystem is still in its early stages, discussions at the OCP APAC Summit 2025 revealed growing industry momentum toward building a scalable, open chiplet marketplace.
The Open Chiplet Economy (OCE) is an initiative by OCP to foster an open ecosystem for chiplets. Its vision includes establishing a chiplet marketplace, enabling easy modular designs, and creating standard interfaces and methodologies. This aims to facilitate multi-vendor chiplet solutions and rapid technology adoption through open innovation and community collaboration.
Credit: Joseph Chen
Article edited by Jerry Chen
