The IoT (Internet of Things) technology led to tremendous growing of the connected devices. This growing connected market required new approach of security certification which will meet the fast and dynamic changed products.1 Cybersecurity Standards1.1 Type of coverage - Environmental vs. Functional StandardizationTo standardize this discipline, academics and professionals collaborate and seek to set basic guidance, policies, and industry standards.Cybersecurity standards have evolved to address multiple layers of protection in the product lifecycle, which can broadly be categorized into two complementary domains: environment security and functional security implementation. This layered approach is particularly critical in complex and vulnerable ecosystems such as the Internet of Things (IoT), where both the development infrastructure and embedded security functions are frequent attack surfaces. This classification reflects the understanding that effective cybersecurity requires both a secure foundation during development and robust protections within the product itself*Environment security standards Secure the development, testing, and manufacturing environments by protecting tools, source code, and intellectual property, and by establishing Information Security Management Systems (ISMS).*Functional security standards Ensure products embed security features like secure boot, cryptography, access control, and tamper detection, applied during the design phase to make security requirements testable and verifiable.These two domains are not mutually exclusive but deeply interdependent.1.2 Standardization Category Governance LevelsThe standards are developed and applied at multiple governance levels - international, regional, and national (country-specific) - to address diverse regulatory environments, technological ecosystems, and geopolitical considerations. Each level plays a unique role in shaping the frameworks, compliance mechanisms, and technical specifications governing the protection of information assets:* At the international level, standards are typically developed by globally recognized bodies such as ISO/IEC aim to provide global harmonization, facilitating international trade, cross-border data flow, and common security assurance frameworks for multinational organizations.*Regional standards are typically introduced by economic or political unions to align practices across member states. They often build on or adapt international standards while considering regional laws and policies.*At the National level, individual states develop and enforce security standards tailored to their specific infrastructure, threat landscape, and regulatory priorities.This multi-tiered structure ensures both broad interoperability and local adaptability. International standards foster global trust and facilitate compliance across borders. Regional standards address regional legal and regulatory harmonization. National standards reflect local priorities, strategic industries, and legal systems.1.3 Applicability across Horizontal and Vertical frameworksStandards in the field of cybersecurity and ICT are strategically developed to serve either as cross-industry frameworks (horizontal standards) or as domain-specific regulations (vertical standards):*Horizontal standards Apply across industries using a risk assessment approach to manage general cybersecurity risks in products and processes.*Vertical standards Tailored to specific sectors like automotive or healthcare, focusing on meeting domain-specific requirements based on horizontal frameworks.The main difference between a horizontal/risk assessment-based approach and a Vertical/product-based approach is the focus of the process: the former focuses on managing potential risks, while the latter focuses on delivering a product that meets specific requirements.1.4 Evaluation MethodologyLooking at the cybersecurity standards, there are 3 main types of Evaluation methodology:*Self-Declaration - The manufacturer independently claims compliance without external review.*Declaration of Conformity (DoC) - A formal statement confirming compliance with legal and technical requirements.*3rd Party Evaluation - An independent body verifies compliance through testing, reviews, and audits.For some of the standard the minimum evaluation methodology is define while there is a freedom for the evaluation sponsor/ manufacturer to use more strict methodology for the evaluation, exm: for Declaration of conformity to use 3rd party evaluation for demonstrating the conformity. It is popular is cases of test evidence, especially for penetration testing.2 Classification and Analysis of Security IT StandardsSeveral widely recognized IT standards were selected for analysis based on their relevance to cybersecurity, regulatory compliance, and sector-specific adoption. At this part the standards are classifies and analyzes across key dimensions, including evaluation methodology (e.g., self-declaration, declaration of conformity, third-party certification), type of coverage (functional vs. environmental), standardization category governance level and applicability across horizontal and vertical frameworks:Table 1: Security IT StandardsSource: CompanyThe evaluation of the selected standards based on their coverage type - whether functional or environmental - yields the following overview:Figure 1: Standards Type of coverageSource: CompanyAs illustrated, the majority of the analyzed standards primarily address functional security requirements, while only 10% focus exclusively on environmental aspects. Notably, 20% of the standards incorporate both environmental and functional security considerations. An examination of the governance levels yielded the following insights:Figure 2: Distribution of Standards by Region and GovernanceSource: CompanyIn this analysis, 35% of the standards are international in scope, while 40% represent regional. The remaining 25% are national standards established by individual countries.An analysis of standards applicability - reveals that 40% are horizontal standards, providing general requirements for ICT products or cryptographic algorithm implementations. In contrast, 60% are vertical standards, tailored to specific market segments such as the automotive and industrial sectors. Notably, 45% of the overall standards focus specifically on the IoT segment:Figure 3: Standards ApplicabilitySource: CompanyExamining the type of methodology which is used to be certified foreach standard shows the following:Figure 4: Evaluation MethodologySource: Company75% of the standards require third-party evaluation, while only 15% allow for self-declaration. These requirements suggest that the majority of ICT products are likely to undergo third-party certification. However, to accurately assess the impact, it's important to consider which of these standards are mandatory. The current situation is that Only 35% of the cybersecurity standards are mandatorily required.3 The ChallengeDue to the IoT revolution which all is connected, the challenges at the national segment and in the market segments are to be able to secure the citizen from cyber threats, attacks and cybercriminals by developing the appropriate regulations. These challenges may present obstacles to achieving effective and comprehensive cybersecurity regulation:*Evolving Threats: Cyber attacks are becoming more advanced and exploit new vulnerabilities, requiring adaptable regulations.*Global Harmonization: Diverse legal systems make aligning international cybersecurity regulations complex but essential.*Regulatory Fragmentation: Varying national standards can burden global companies and hinder collaboration.*Tech Advancements: Rapid growth in AI, quantum computing, and IoT challenges regulators to keep pace.*Privacy vs. Security: Balancing data protection with cybersecurity needs remains a persistent issue.*Resource Gaps: Smaller firms may lack the resources to comply with complex regulations.*Skills Shortage: A global lack of cybersecurity talent threatens effective implementation.*Compliance Burden: Managing multiple regulatory frameworks adds cost and complexity.*AI-Powered Threats: Attackers are increasingly using AI, demanding smarter defensive measures.*New Sectors: Emerging fields like smart cities and autonomous vehicles need tailored cybersecurity rules.Addressing these future challenges will require collaboration between governments, industry stakeholders, international organizations, and cybersecurity experts. Striking a balance between proactive regulation, technological innovation, and effective enforcement will be crucial to building resilient and secure digital ecosystems in the years to come.For more information on how Winbond can support your security and compliance needs, visit Winbond's website or contact Winbond directly, or download the latest Hardware Security White Paper.

ASUS VivoWatch is a smart health watch not only welcomed by individual customers from the increasing awareness of personalized health management, but also creates innovative solutions for healthcare settings, bringing strong momentum enhancing digital transformation at Taiwan's medical and health industries.ASUS and Far Eastern Memorial Hospital (FEMH) agreed on a Memorandum of Understanding (MOU) to launch a project "Establishing Healthcare Ecosystem through Smart Wearable Devices" recently. Partnership between local technological company and the hospital will build a complete remote healthcare network with ASUS medical-level smart wearable devices and its management system.This network is designed to bridge the gap between hospital-based care and community-based prevention and treatment, connecting various healthcare scenarios within the hospital to local New Taipei communities.Cross-industry partnership as a standard for biomedical technology integrationFar Eastern Memorial Hospital, a pioneer in digital healthcare, began its transformation in 2011. The hospital has gradually introduced Electronic Medical Record (EMR) system, AI in diagnostic imaging, Early Warning Systems, and Clinical Decision Support Systems (CDSS). FEMH was awarded as a Smart Hospital in 2024.Dr Chih-Hung Chang, Vice President of FEMH, emphasizes that a Patient-Centered Care and innovation-driven application is the key to digital transformation at the hospital. " The collaboration with ASUS marks an important milestone for cross-industry partnerships." Dr Chang said at the press conference."As ASUS is a leading technology brand in Taiwan, the collaboration between two parties showed an optimal integration of Taiwan's "BIO & ICT" industries, especially given ASUS's products have passed the regulatory approval in Taiwan, which enhances adoption opportunities in healthcare facilities. ASUS's flexibility in providing integrated hardware and software solutions and support perfectly complements FEMH's principles of improving medical efficacy, alleviating staff burdens, boosting efficiency and eliminating errors. Dr Chang added.A leading new trend in health management with medical-level wearable devicesSharon Pan, Associate VP of ASUS, also stated the partnership as a significant milestone to the company."The ASUS VivoWatch is the first wearable device in Taiwan to receive approval from Taiwan Food and Drug Administration (TFDA), signifying its recognized quality and medical-level capabilities. ASUS VivoWAtch offers personal health management solutions, aiming to establish a new healthcare service model for individuals inside and outside the hospital.Pan stated that "people-oriented" is the company philosophy of ASUS, aiming to relieve burdens and better healthcare through technological innovations.The ASUS-FEMH partnership will implement ASUS's hardware, software, and AI technologies into clinical settings, fostering a virtuous cycle between service providers and users. Furthermore, it also lays a strong foundation for ASUS to introduce more smart products to the global market.Humanization-based and user-centric designEmphasizing a "user-centered" design, ASUS VivoWatch series features a large font display for clear readability, a straightforward interface to minimize complexity, and intuitive sliding functions, which thereby to be more accessible to senior and elder users. Pan emphasized that the product was undergoing extensive validation by older demographics to ensure it fully fit the needs.One of the unique functions of ASUS VivoWatch is its remote monitoring feature, allowing families to check the health status in real time. This feature enhances family connections and caregiving, thereby effectively addressing the need of an aging population. Dr Chang of FEMH also gave positive endorsement to this innovative feature, stating that this could bring significant benefit to family care.From a treatment-centric to prevention-focused model, the strategic alliance between ASUS and Far Eastern Memorial Hospital symbolized the transformative shift in healthcare service delivery mode. By leveraging innovation and technology integration the partnership aims to elevate Taiwan's healthcare industry and establish a more comprehensive healthcare ecosystem with expanding smart wearable device scenarios to various medical institutions in the future.Partnership of ASUS and Far Eastern Memorial Hospital launches the project "Establishing Healthcare Ecosystem through Smart Wearable Devices"

Online wagering is no longer a solitary act—it thrives on real-time chats, shared wins, and community-driven play. Discord, once a haven for gamers, has evolved into a central hub where players trade strategies, join live tournaments, and react instantly within fast-moving servers. With voice channels, bots, and direct links to platforms, Discord seamlessly integrates conversation with action. It's not just a forum—it's part of the game itself.How digital wallets are reshaping player expectationsThe online gambling experience has evolved far beyond simple gameplay. Today's platforms aren't just places to place bets—they're ecosystems where speed, reliability, and seamless interaction define user satisfaction. As community platforms like Discord shape how players connect, the need for fast, secure financial movement has become equally central.Digital wallets have quickly become the connective tissue between gameplay and real-time access. Whether jumping into a fantasy draft seconds before it locks, grabbing a bonus in the middle of a live table, or moving between formats on the fly, one thing stays consistent: payments need to keep up. With e-wallets and crypto-based tools handling transactions at speed, players rarely miss a beat.What was once a luxury—fast withdrawals—has become a fundamental part of platform design. Players expect it, and providers have taken notice. Casinos leading the field don't stop at speed; they offer wide-ranging payout methods, user-friendly thresholds, and transparent rules tied to bonuses. According to insights by PokerScout, the most respected fast-payout platforms are built on a foundation of consistency, fairness, and proactive support. The result is a system that favors responsiveness over rigidity.This growing emphasis on speed and clarity isn't an isolated trend. It reflects a broader shift toward services that respond in real-time, mirroring the immediacy of modern digital life. As user expectations grow sharper, so must the tools and infrastructure that support them. The platforms that succeed will be those that treat financial flow as an essential part of the overall experience, not just a background function.Transactions without the waiting roomAs this sense of community has grown, so has the demand for smoother financial infrastructure. Long gone are the days of clunky bank transfers and days-long withdrawal queues. Digital wallets—Skrill, PayPal, Venmo, Apple Pay, and their crypto-friendly counterparts—are filling that gap, and doing so with startling efficiency.The appeal is obvious. A player can fund their account in seconds, switch tables, and—should fortune favor them—cash out just as swiftly. Many digital wallets now support instant withdrawals, bypassing the red tape that once soured the gaming experience. Combined with multi-layered encryption and biometric authentication, these wallets aren't just fast—they're safe, too.The compatibility between gambling platforms and wallet technology has improved dramatically. Issues like failed deposits or region-based restrictions have largely disappeared. Today's integrations are fluid, fast, and built for a global user base. Operators increasingly treat payments not as a side function, but as a vital part of user engagement. In fact, how gambling platforms manage payouts and financial security has become central to shaping the overall player experience.Where conversations and currency collideThis convergence of real-time community and real-time payments has reshaped the very definition of a gambling platform. What was once confined to a standalone website is now dispersed across digital touchpoints. Players might learn of a new bonus not via an email campaign, but through a Discord ping. They may join a poker tournament not by browsing a site, but after seeing a live countdown posted by a chatbot.What emerges is a decentralized gambling environment where engagement flows freely and organically. A player chatting in one tab can, within moments, be transacting in another. There is no disconnect. The social and financial layers work in tandem, reinforcing each other.Notably, this ecosystem supports more than just gameplay. It fosters loyalty. Regulars recognize each other by username, inside jokes develop, and moderators become trusted figures. In many ways, it's akin to the atmosphere of a small local casino—just digitized, global, and perpetually awake.Cryptocurrency's expanding roleCryptocurrency wallets are gaining traction not just for privacy, but for their speed, security, and utility—especially in regions where traditional banking feels restrictive. Stablecoins like USDT and USDC, now widely accepted, offer consistency without the turbulence of Bitcoin or Ethereum. They function more like digital cash, appealing to players who want fast, reliable payouts.As decentralized finance matures, more platforms are experimenting with blockchain-driven features: smart contracts, verified fair gaming systems, and even tokenized casinos. These changes are gradual, but the shift is unmistakable. The blend of community and tech has already moved gambling far beyond its solitary origins.Looking forwardWhat's unfolding isn't just a case of improved backend systems—it signals a shift in how online gambling is experienced. Social hubs are now central to player engagement. Platforms like Discord lead the way in interaction, while wallet tech removes transactional barriers. Together, they redefine the tempo of gameplay, with community-building platforms for digital engagement forming the connective tissue of this new ecosystem.The focus is shifting: less about isolated bets, more about ongoing presence and shared momentum. Money moves in sync with dialogue. Strategy unfolds in real-time. Players gather not just to win, but to belong.Even as technology evolves and regulations adjust, one thing is becoming clear: online gambling is no longer just about placing wagers. It's about participating in a connected, living network—where conversation, competition, and cash all flow together.Yet, amid this evolving landscape, players must remain mindful of the risks. While the experience is more immersive and socially driven, it's essential to set limits, stay aware of financial boundaries, and recognize the difference between engagement and excess. Smart play isn't just about strategy—it's about knowing when to step back, ensuring that participation remains enjoyable and sustainable. After all, in this interconnected world, the best wins come from balance.

Digital payments now make up more than half of retail transactions in the Philippines, rising from 42% to 53% in just over a year, as more people across cities and rural areas move away from cash and traditional banking.Non-bank lenders, now responsible for most digital credit activity, are expected to lend over US$550 million, driven by younger borrowers turning to faster alternatives and tens of millions of new downloads logged in the first three quarters.This shift goes beyond how people move money—it is changing how they interact with digital systems that combine practical tasks with entertainment. With fewer people relying on physical outlets for financial services or leisure, more activity now takes place in blended spaces, where everything runs through a single screen.That overlap is also reshaping how casino-style games are delivered. Instead of using direct deposits or card payments, many of these experiences now run through regulated sites that allow real rewards while staying within legal guidelines and offering easier access.These platforms use two types of virtual currency. Gold Coins are used for casual gameplay with no cash value, while Sweeps Coins—earned through purchases, bonuses, or other offers—can be redeemed for prizes once a set number is reached. It removes the usual payment friction, keeps the experience fast and familiar, and fits well with the way mobile-first users already move through digital spaces.To understand how deep this change runs, look at the infrastructure behind it: the national QR Ph standard now covers more than 675,000 merchant outlets nationwide, from urban malls to suburban bistros and wet markets.That means scanning to pay is no longer confined to tech hubs—it's a daily habit in small-town sari‑sari stores and public transport stops. The push didn't come out of thin air: government and private sectors collaborated throughout the pandemic to fast-track QR Ph deployment; it's now central to the Bangko Sentral's goal of shifting 60–70% of retail transactions into digital channels.While QR Ph strengthens domestic convenience, there are signs it'll reshape regional behavior too. Through ASEAN initiatives like Project Nexus, the Philippines is aligning its fast‑payment systems for cross-border transactions—so someday a QR scanned in Manila could work in Bangkok or Jakarta, using local currencies .On the credit side, non-bank lenders aren't idling—they now hold over 55% of the digital lending market, translating to more than US$ 550 million in loans. Many of those are microloans under PHP 20,000, extended based on app behavior and repayment patterns rather than traditional bank scores.The result: more Filipinos—including freelancers, small entrepreneurs, and remote workers—are getting access to finance they might otherwise miss.Even pawnshops and money service businesses have leaned into this shift. Home to over 22,700 outlets as of late 2024, these channels act as both remittance touchpoints and fintech access nodes, particularly in Luzon's hinterlands.In places where people once relied on cash or informal credit, a digital payment or app-based microloan is now available.Behind all this stands robust policy support, with new e‑money licenses, an updated National Payment Systems Act, and a revamp of digital bank rules. Over 70 electronic money issuers now operate under BSP oversight, joined by emerging digital banks.The same regulator is also exploring a wholesale central bank digital currency, primarily for improving interbank settlement and cross‑border transfer efficiency.What's unfolding isn't a sudden break from the past but a steady recalibration, where tools built for speed and access are now shaping the pace of everyday life, often without ever needing to be noticed.

Singapore has established itself as a leader in developments related to artificial intelligence. By using government funds, forging important partnerships, and investing heavily in talent, Singapore has managed to be a prime spot for AI investments and prepare for a future based on automation, digital infrastructures, and smart offerings.The government will use more than S$1 billion over the next five years for AI, mainly to acquire top-tier chips and shape a computing environment that can help new technologies in various sectors. Through Budget 2025, the government unveiled the Enterprise Compute Initiative with S$150 million intended for assisting companies to access AI and computing services by teaming up with leading cloud companies. The National Productivity Fund was boosted by S$3 billion to help companies become more innovative and raise efficiency.Still, building the strategy goes beyond putting in place the right technology. Launched late in 2023, the National AI Strategy 2.0 is aimed at bringing about long-term changes across various sectors. The plan is founded on three main goals: advancing the industry, training people, and joining efforts with other nations, by supporting 15 precise steps to support AI research, grow the number of skilled people locally, and increase Singapore's global AI importance. A key aim is to ensure the national AI workforce grows to have over 15,000 professionals by 2030.It is so effective due to how well it matches real-world situations. What used to be just a new technology is now a part of daily activities in Singapore. AI is used in hospitals to help with diagnosis and organize the care that patients receive. Because of predictive models, managing fleets, narrowing down delivery times, and saving fuel is now happening in logistics. AI is being used by manufacturers locally to monitor equipment and avoid breakdowns in advance.In addition, the impact reaches many areas, covering the way people get to and from work, how they work and how they relax. Smart Nation projects make use of AI to optimize traffic and manage the use of energy. AI speech recognition technology works with numerous languages in Southeast Asia to support more people in using various services. Also, entertainment is now focused on what suits each person, with services recommending different forms of entertainment using powerful algorithms.That same shift is happening in online gaming and betting. With more people choosing to bet online in Singapore, platforms are using AI to offer smarter odds, detect suspicious behavior, and personalize the user journey. These tools not only improve user experience but also help providers maintain integrity and security in a fast-paced digital space.The funding boom is already showing results. Singapore drew in nearly USD 2 billion in artificial intelligence investments last year. SMC and other companies were able to raise nearly half of the total amount through one round to promote their worldwide growth. AI Singapore and the MERaLiON Consortium are encouraging partnerships between local and global groups to increase the use of responsible AI. Because of its clear rules, strong leadership and first-rate research centers, Singapore keeps supporting the growth of regional tech companies.Another major part of the strategy is developing the workforce. Students are helped by LearnAI, and middle-career workers are updating their knowledge with the help of SkillsFuture. They are meant to help people take advantage of opportunities in fast-growing industries. In addition, companies gain value from the Workforce Development Grant, which assists with training their staff as they switch to digital platforms.More technology in everyday life is raising questions about ethics and what we should do. Clear instructions for fairness, transparency and accountability in the Singapore AI Governance Framework assist in addressing these issues. Since AI has a clear focus on real-world issues, regulators in the EU are using the same model in their other activities.Singapore's AI-driven transformation is reshaping industries, improving efficiency, and enhancing everyday life. However, as technology integrates deeper into financial systems, entertainment platforms, and even online gaming, individuals must remain vigilant about investment risks and responsible gambling. AI-powered financial tools and betting algorithms can enhance user experience, but they also require careful evaluation. It is essential to conduct thorough research, exercise caution, and make informed decisions to avoid potential pitfalls in rapidly evolving digital landscapes.

Shanghai is braced to welcome some of the biggest names in mobile technology to the 2025 Mobile World Congress at the Shanghai New International Expo Centre from June 18th to the 20th. This event has been held in China for 12 years, and local and international operators, solution providers, and vendors have had the opportunity to come together to improve the connectivity ecosystem in the country.Mobile technology has never been as sought after, with communications providers and consumers relying on relationships to drive development. In 2024, it was estimated that around 71% of the planet now had access to smartphone devices, and they have improved convenience and access for many.Mobile banking and the rise of crypto investment and use are examples of how mobile technology has improved financial inclusivity for consumers in countries with unstable financial institutions. The gambling industry has also benefited massively from online operations, with consumers living in prohibitive regions now having access to real money online casino options both legally and safely.Mobile tech has also improved consumer convenience with all types of shopping and communication possible through mobile devices, facilitating an easier work-life balance.Events like the MWC have been instrumental in building relationships between stakeholders, developers, and legislators that have facilitated mobile tech growth. This platform was created by the Global System for Mobile Communications Association (GSMA), a trade association tasked with supporting and promoting the Global System for Mobile Communications (GSM) standard.The GSMA now focuses on the standardization of tech and cooperation and interoperability between mobile networks. It provides industry insights and research, helping to encourage innovative mobile technology. There are now five MWC events held around the world, including the MWC Barcelona, Kigali, Las Vegas, Doha, and Shanghai events.MWC25 Shanghai is set to welcome approximately 40,000 attendees, with about 400 speakers and 250 exhibitors, and partners. Some of the featured speakers attending this year's event include the managing director of AI Club Asia, Bo Gao, China Mobile's Chengdu Industry Research Institute President, Yu Su, and China Telecom's chief scientist, Qi Bi.Speakers from Deloitte China, Intel, Nokia Shanghai Bell Co., Space42, Qualcomm, Singtel, and ZTE will also be present, with a full list of speakers available to check on the MWC Shanghai 2025 website.News that the event agenda has been released will give attendees an opportunity to plan ahead, with countless talks and exhibits covering everything from cloud services, AI, transport, and mobile services to cybersecurity, corporate innovation, fintech, and much more. Everything kicks off with the opening ceremony at 9:00 am on Wednesday, the 18th of June, at the MWC Main Stage, which is located at the Grand Shanghai Ballroom.The opening ceremony will also feature the first keynote speeches from GSMA director general Vivek Badrinath, China Mobile's Yang Jie, and Singapore Telecommunications' Anna Yip. Visitors will hear about the potential of AI, open APIs, and the benefits of 5G networks from industry experts in a session moderated by GSMA CEO John Hoffman.Visitors will have a great choice of programmes to attend, with the final one taking place on Friday, the 20th, at 1:30 pm. Guang Yang, Neil Shah, and Fanni Li will look back over the event and discuss some of the key points and technologies that featured.Exhibitions will take place throughout the event, with the 4YFN zone being the place to investigate for those with an interest in exciting innovative startups. The IOTE showcase covers Internet of Things developments. Visitors can also enjoy the World Robot Contest Qualifying round, while the Future Tech Hall explores the benefits of emerging mobile technologies.ConclusionThe MWC25 Shanghai is China's premier mobile tech event and showcases the new technologies that could shape the future of tech development from June 18th to the 20th at the SNIEC.

Credit: PEGATRONPEGATRON, a globally recognized Design, Manufacturing, and Service (DMS) provider, is pleased to announce its participation in GTC Paris 2025, where it will introduce a comprehensive lineup of next-generation AI server solutions. Built on Nvidia Blackwell architecture, PEGATRON's latest systems are tailored to meet the evolving demands of AI training, reasoning, and enterprise-scale deployments.Nvidia GB300 NVL72Leading the showcase is the RA4802-72N2, built on the Nvidia GB300 NVL72 rack system. This high-performance platform incorporates 72 Nvidia Blackwell Ultra GPUs and 36 Nvidia Grace CPUs, delivering up to a 50X increase in AI factory output with advanced inference capabilities. To address the demands of high-performance workloads, the rack features PEGATRON's in-house developed Coolant Distribution Unit (CDU), supporting 310 kW of cooling capacity and equipped with redundant hot-swappable pumps to ensure reliability and operational efficiency in mission-critical data center environments.Nvidia HGX B300 liquid-cooled and air-cooled solutionsAlso featured is the AS208-2A1, a 2U liquid-cooled AI GPU server equipped with an Nvidia HGX B300 system with dual AMD EPYC™ 9005 processors in a compact form factor. Scalable within a 48U Nvidia MGX rack, it supports configurations of up to 128 GPUs and 32 CPUs, operating under a high-efficiency direct liquid cooling design. Optimized for the AI reasoning era, the system leverages the Blackwell Ultra architecture to deliver breakthrough performance for complex workloads such as agentic systems, real-time reasoning, and video generation, making it an ideal platform for next-generation AI data centers. For data centers seeking robust compute capabilities without a liquid cooling infrastructure, PEGATRON introduces an 8U air-cooled GPU server featuring an Nvidia HGX B300 systems. This system supports either dual Intel® Xeon® 6 processors (AS801-2T1) or AMD EPYC™ 9005 CPUs (AS801-2A1), providing deployment flexibility while maintaining high-performance compute for AI model training, scientific research, and advanced analytics.Nvidia RTX PRO serverRounding out the portfolio is the AS400-2A1, a 4U RTX PRO server that integrates 8 Nvidia RTX PRO 6000 Blackwell Server Edition GPUs and dual AMD EPYC™ 9005 processors. This platform offers near-universal acceleration for a wide range of enterprise AI workloads—from multimodal AI inference and physical AI to design, scientific computing, graphics, and video applications. It supports the Nvidia MGX PCIe Switch Board with the ConnectX-8 SuperNIC, enabling 800 Gbps ultra-high-speed networking in a single device, high throughput and improved energy and cost efficiency, making it an ideal foundation for modern AI infrastructure."As AI continues to reshape industries, the need for powerful, scalable, and energy-efficient infrastructure is more critical than ever," said May Wang, vice president of PEGATRON. "Our new platforms—built on Nvidia Blackwell Ultra and RTX PRO architectures—are purpose-built for the next generation of data center and enterprise AI factories, enabling customers to unlock new levels of performance, reliability, and productivity."PEGATRON welcomes technology leaders, innovators, and data center professionals to visit Booth G10 at Paris Expo Porte de Versailles on June 11–12, 2025. Connect with PEGATRON's expert team to discover how our AI-optimized platforms are shaping the future of intelligent infrastructure.For more information, please visit PEGATRON SVR website and follow us on LinkedIn and YouTube.https://svr.pegatroncorp.comhttps://www.linkedin.com/showcase/pegatron-svr/?originalSubdomain=twhttps://www.youtube.com/@pegatroncorp.6158About PegatronPEGATRON Corporation (hereafter referred to as "PEGATRON") was founded on January 1, 2008. With abundant product development experience and vertically integrated manufacturing, Pegatron is committed to providing clients with innovative design, systematic production and manufacturing service to comprehensively and efficiently satisfy all our customers' needs. Drawing on accumulated experience in server design and manufacturing, Pegatron now focuses on developing a variety of state-of-the-art servers that meet the requirements of present and future Cloud Service Providers' data centers, as well as enterprise-grade data centers.

In the age of digital residents, semiconductor chips are present in almost every aspect of our lives. Whether it is from data centers to computers, cell phones, computer central processing units, and other electronic devices there are a variety of chips installed. Contemporary microprocessors or graphics processors can hold more than 50 billion transistors on them, with a failure rate of just shy of one in a billion. To achieve such levels of reliability in chip operation, Smiths Interconnect's test sockets play a critical role in the overall chip design and package testing process.The role of testingWhat role does the chip play in these devices? The role of various chips on top of these electronic devices is more similar to the role played by various organs of the human body. The overall management of electronic devices and computing logic processing, etc., need the CPU (the core component is the chipset), the CPU is equivalent to the human brain. Electronic devices to identify sound, processing audio, need audio processing chip, equivalent to the human body's ears. Electronic devices receive images and process pictures, requiring a picture processing chip, which is equivalent to the human body's glasses. In short, these devices have various functions that require corresponding chips to achieve, just like the human body's various organs to achieve different functions.From the 'brains' of processing units to the 'eyes' of imaging systems, every socket undergoes comprehensive testing to ensure optimal performance. Credit: Smiths InterconnectTesting during production plays an important role in ensuring reliability and repeatability. Semiconductor manufacturing plants perform tests at each stage of production to eliminate defective parts as early as possible, while precisely controlling each process parameter of the chip. The factory first performs basic functional testing of the semiconductor chip core at the wafer level, discarding any faulty parts, and then separates the tested chips into individual units and packages them for further testing. Usually the chip is tested up to 20 times before it leaves the factory. Most testing is done by special equipment attached to the chip, which uses electrical signals to stimulate the chip to simulate the real state and capture the response of the chip to see if it meets the design requirements. These are known as automatic test equipment (ATE) systems typically sell for $1 million to $2 million and can be programmed to test a variety of chips for many years.Smith Interconnect Semiconductor test solutionsSmiths Interconnect offers high quality test sockets with a wide variety of spring contacts designed using different design standards. The products are flexible, design optimized and quick to deliver. Test sockets are available in a variety of leaded and leadless package types, including leadless (QFN) packages, quad flat packages (QFP), small outline integrated circuits (SOIC), ball grid array (BGA) packages, and connection tray grid array (LGA) packages.Representative test socket: DaVinci high speed test socketSmith Interconnect's DaVinci Series test socket is a high-performance coaxial socket that precisely tackles 56/112G SerDes PAM4 test challenge. Consumer demand for next-generation technologies such as the Internet of Things, 5G, artificial intelligence (AI), deep learning and self-driving vehicles require high-speed data transmission and processing technologies, and high-reliability testing is critical for the high-speed, multifunctional digital and analog devices that drive them.The DaVinci Series test socket offers high-speed, high-reliability testing for advanced 5G and AI chips. Credit: Smiths InterconnectIn a wide range of high-speed applications, DaVinci series high-speed test sockets are the ideal high-speed solution for testing large network switching core chips introduced for 5G and cloud computing. DaVinci high-speed application sockets IC sockets integrate spring probe technology and patented insulation materials to provide excellent signal integrity and high mechanical durability. The socket provides an impedance-controlled coaxial solution with analog RF up to 67 GHz and digital transmission speeds of 112 Gb/s. The use of spring probe technology in a patented insulating material housing results in a coaxial structure that reduces test height and material deflection. In addition the reduced test height and low material deflection characteristics of the new DaVinci High Speed Series ensure efficiency and accuracy in the final test phase of intelligent network visualization technologies, 5G and artificial intelligence applications. The new DaVinci Series also features a fully shielded signal path, a socket frame that acts as a heat sink for excellent thermal performance, and interchangeable spring-loaded probe contacts. It is rated at 3.0A and has a low contact resistance (<80mΩ).With the current upgrade of high-speed communication standards such as 5G, designers of chip ICs for consumer electronics, smart driving and power management are increasingly using QFN packages in applications where both stringent electrical performance requirements and the smallest possible chip form factor and footprint are required. With their directly connected peripheral pad structure, large ground blocks for thermal and electrical performance, and very thin stack heights, QFN packages offer unparalleled advantages, but also present a new set of test challenges. Addressing these test challenges requires a stable, reliable and electrically "clean" test socket solution.Whether our customers' challenges are cost, R&D capability, lead time or quality, Smiths Interconnect aims to provide customers with the best possible solution for IC testing.

As the demand for secure and efficient embedded solutions continues to grow, manufacturers are integrating secure subsystems into System-on-Chip (SoC) architectures. Professionals such as engineers, security architects, systems architects, and product developers involved in embedded security, secure elements (SE), SIM cards, and hardware security modules (HSMs) for 5G connected devices—such as smartphones, IoT devices, and automotive applications—need to understand Protection Profile 0117 (PP0117). The article aims to elucidate how PP0117 establishes the security framework for integrating secure subsystems into SoCs, highlights its differences from PP0084, and discusses its endorsement by the GSMA, the global authority on mobile security.What is a protection profile?A Protection Profile (PP) is a security guideline document that standardizes the development, integration, and evaluation of security mechanisms in hardware and software. PP0117 was specifically designed to define security requirements for integrated secure subsystems in SoCs, such as embedded SIMs (eSIMs) and secure elements (SEs).Before PP0117, Protection Profile PP0084 was widely used for stand-alone security components, such as SIM cards and secure elements. However, integrating these components directly into SoCs presents new challenges that PP0084 does not address, such as defining security boundaries within complex chip architectures. PP0117 was developed to overcome these challenges, ensuring strong security for integrated secure elements (iSE) in SoCs.IntroductionProtection Profile 0117 (PP0117) is a protection profile designed to facilitate the integration of a secure subsystem (3S) into large-scale System on Chip (SoC) architectures.Prior to PP0117, Protection Profile PP0084 was used to evaluate stand-alone security components such as secure elements (SE) and SIM cards. However, when integrating the logical functions of SE or similar devices into a larger SoC, the implementation constraints render obsolete some of the methods and requirements of PP0084.Secure Sub-System in System-on-Chip (3S in SoC) Protection Profile was developed to address the security of integrated solutions and provide the industry with a unified set of clear and assessable security requirements to be fulfilled.This PP was developed under the Eurosmart association by gathering the technical committee members, including developers, labs (ITSEF), and certification bodies. The certification body selected for PP0117 is the German Bundesamt für Sicherheit in der Informationstechnik (BSI).PP0084 vs PP0117 based designsPP0084, originally designed for discrete security elements (such as SIM cards and smart card chips), assumes a physically isolated security boundary with strict interface protocols.By contrast, PP0117 adapts security guidelines for secure elements integrated into SoCs with complex internal and external interfaces. The key differences include:Credit: WinbondPP0117 ensures that integrated secure elements maintain the same level of security as stand-alone secure elements, while adapting security requirements to the realities of SoC design.There are several major differences that need to be considered when designing and evaluating a secure subsystem in a large SoC, as opposed to a stand-alone secure controller.The most notable differences arise from process constraints in device fabrication, such as the absence of embedded non-volatile storage and the difficulty in defining security boundaries. Evaluating an integrated secure subsystem is also more complex compared to a stand-alone device. This complexity stems from the numerous interfaces the integrated subsystem shares with the rest of the SoC, as opposed to a stand-alone device with limited pinouts and strict interface protocols. Consequently, all parties involved in the design, fabrication, evaluation, and utilization of such secure subsystems must adhere to a more comprehensive set of guidelines, as outlined by PP0117.A standard SE or eSIM is packaged in a small, limited pin-count package. In terms of security evaluation, this small, packaged device constitutes the Target of Evaluation (TOE). Evaluating such a device is relatively straightforward due to its limited range of connectivity and interfacing options. However, in the case of a large SoC, the majority, if not all, of the secure subsystem's interfaces are internal to the die and are seldom externalized. Additionally, there may be extra interfaces that are not typically present in stand-alone security devices, such as memory interfaces, debug interfaces, system bus interfaces, and those used for more advanced functions.PP0117 is designed to guide the development and evaluation of integrated secure functionality, defining the requirements for such interfaces and outlining methods to assess their security.PP0117 version 2 and GSMA endorsementThe GSMA (Groupe Speciale Mobile Association) is the global organization that sets security standards for mobile network security, SIM technology, and eUICC (embedded SIMs). In 2024, GSMA endorsed PP0117 as the security framework for integrated eUICC (embedded Universal Integrated Circuit Card) implementations.GSMA recently published eUICC (embedded SIM) Protection Profile V2.0. This Protection Profile allows for both discrete eUICC and integrated TRE (Tamper Resistant Element) implementations for embedded SIM/UICC implementation. The Protection Profile V2.0 references PP0117 for integrated solutions on top of PP0084 for the baseline requirements of eUICC. The GSMA's support for integrated secure subsystems that implement SIM/UICC capabilities facilitates a higher level of functional integration of handsets and IoT devices into the SoC.Major PP0117 use casesThe most notable use case of PP0117 is integration of SIM card functionality into SoC devices. The trend of SIM integration takes place in two major verticals – IoT connected devices and mobile phones.1) Integrated SIMIn mobile phones, the main SoC device integrates as many logical functions as possible. This approach enables a reduction in power consumption, offers better pricing, minimizes board space, and introduces new functionalities. Given that SIM cards essentially function as simple microcontrollers with non-volatile storage for code and data, their integration into larger SoC devices appears inevitable. In connected IoT controllers, most, if not all, of the system's functionality, including RF, baseband, and application processors, is integrated into a single device. Implementing an integrated SIM within such a device optimizes the overall cost structure, a benefit that typically extends to the end customer.2) Integrated Secure ElementAnother use case is the integration of secure elements into the mobile phone's SoC. These secure elements manage critical secure functions such as mobile payments, electronic ID integration, biometric user authentication, and operating system security. Almost all modern smartphones feature at least one secure element. The exception is in China, where a secure element isn't mandatory for mobile payments. Mid to high-range mobile phones incorporate two secure elements, one for embedded SIM (eSIM) functionality and another for mobile payment and related features. Embedding these elements into the SoC can notably impact the bill of materials (BOM) cost of the mobile phone, at times representing a significant portion of the total BOM.3) AutomotiveThe hardware security module (HSM) used in automotive subsystems is another example of PP0117-based secure subsystem applications. Such HSMs are used for protecting resources such as V2X networks, driver sensitive information, and vendor assets.In the PC and server ecosystem, security modules integrated into the main SoC devices are used to protect against cyberattack, e.g. boot protection and secure software update.Another emerging use case is supply chain protection, where the secure subsystem can be used to authenticate the hardware during all stages of the system life cycle.In all these use cases, incorporating the secure logic directly into the main SoC is a practical decision from a production cost perspective, since in comparison with the other SoC logic, the secure subsystem requires only a minimal amount of logic and physical space for implementation.Main methodology and evaluation conceptThe Protection Profile and all gathered information were compiled into a single working document, which was then provided to the auditor for conversion into the Common Criteria definition methodology.Several constraints were defined:A. P0117-based designs should have strict conformance to the Security IC Platform Protection Profile (PP-0084). The constraint was essential for the developers to ensure that if they need to certify their products for PP0084 due to the upper layers (software and applets) requiring a composite evaluation to PP0084, they would not need to manage two separate evaluation processes.B. The Protection Profile must comply with EUCC methodology so it can be accepted by the new scheme in Europe.C. The Protection Profile must be aligned with external entities which use\reference PP0084 or plan to use the new Protection Profile in a composite evaluation with their layers\components.D. The Protection Profile should be defined in an Agile way of base requirements and optional packages that the developers can use based on their development.E. The Protection Profile should be general so that it can be used for wide security subsystem solutions in addition to the Secure Element, such as eUICC, iSIM, HSM, TPM, V2X.F. The Protection Profile should support 3 forms of deliveries – IC, hard macro, and programmable macro (PL Macro) to align with industry standards and enable the reuse of the evaluation results across multiple SoCs.G. The Protection Profile should support the different architectures of memory – embedded memory (as in the traditional Secure Element), external off-the-shelf memory, "External Passive Memory", and "Secure Memory" which is a certified component that will be part of the evaluation by the composition evaluation method.Usage of external memoriesAs modern SoC devices are fabricated in cutting-edge technologies, on-chip memories are either costly to implement in terms of silicon area requirements, as in the case of RAM, or outright unfeasible to implement, as in the case of non-volatile memory such as Flash. These limitations dictate the use of external memories with the secure subsystem. To facilitate usage of external memories, PP0117 was structured in an Agile way with a base package. This includes the minimum requirements that any Secure Sub-System within a SoC must satisfy, along with a range of optional packages designed to meet additional industry requirements that have emerged due to the Secure Sub-System in SoC architecture:• External Memory packages (Passive and Secure, volatile and non-volatile memory) – the security requirements related to the data and code stored in the external memory.The external memory package specifies the following requirements:• Protection from content abuse (unauthorized reading erasing or modifying of memory content)• Protection from cloning or replacing of the memory chip between systems• Protection from unauthorized content roll-back• Protection from interfering communication on the external bus, e.g., command replay or modification, eavesdropping, and man-in-the-middle.Passive external memoryIn the case of the passive (i.e. standard, non-secure) external memory, the requirements mandate that the SoC manages all the protection, as the memory device itself has no security functions, and cannot perform or assist in any of the tasks required.Protection from content abuse requires data stored in the external memory to be encrypted. To avoid weakening a fixed encryption key, it is recommended to utilize distinct keys for repeatedly encrypting user-controlled data. Generating multiple encryption keys from a single root key necessitates that the SoC maintains certain state information such as a monotonic, non-volatile counter.Protection from command replay in the case of passive memory is identical to protection from device unauthorized roll-back. In both cases, the adversary forces known and previously authentic information or state into the memory device.The responsibility lies with the SoC to monitor the freshness of the information stored in the external memory for the purpose of detecting modifications originating from command replay (such as writes and erases) or rolling-back the memory content to an earlier legitimate image. To facilitate this, the SoC must maintain state information pertaining to the stored data. This can be achieved using monotonic counter(s). Whenever data is stored externally, it is encapsulated and authenticated in a manner that allows the SoC to verify its version and ensure it has not been rolled- back to an older version.Protection from device cloning requires each SoC to use different keys for encryption and authentication of the data stored externally. This prevents cloning of the content from one memory device into another system, as the information will not be authenticated with a different key.Implementing a monotonic counter in the SoC requires the SoC to have an internal non-volatile storage. As mentioned above, standard non-volatile technologies such as Flash are not available in advanced process nodes, forcing the use of One-Time-Programmable (OTP) fuse-based memory arrays for monotonic counters. Even for a process where OTP is a reputable and robust technology, it has some major limitations and drawbacks:• Cost – OTP fuses require significant die area and usually do not scale well with node technology• Ease of operation – writing an OTP bit requires significant energy release within the die• Security – to withstand some fault-injection attacks on OTP-based monotonic counter implementations, more than one OTP bit is needed per count. In many cases, at least 4 bits per count will be required to maintain reasonable securityIn a typical SoC, under the above security requirements of PP0117 for passive memory, the amount of OTP needed during the life cycle of a SoC device can have a dramatic impact on the cost of the SoC. SoCs that have implemented an OTP-based monotonic counter were required to implement hundreds of thousands of OTP bits, and in some cases, over 1M of OTP bits. This is especially true for IoT devices, where data storage in external memory is common and power cycling occurs frequently. Moreover, these IoT devices are anticipated to have an extensive life cycle, often exceeding 10 years.Secure external memoryThe above requirements apply to secure external memory. However, due to the nature of the secure memory, these requirements are addressed by the memory device itself:• The memory device itself prevents unauthorized access. The commands are signed, and therefore, access and modification of the content require knowledge of a secret key or keys.• Cloning is not possible since the content cannot be accessed by unauthorized entities. Replacement is not possible since the SoC and the original secure memory are bound by a shared secret key, whereas any replacement memory will not have this secret key.• Roll-back of information cannot be accomplished since the secure memory protects the interface by its internal monotonic counter.• Command replay is not possible since the monotonic counter in the flash device ensures that commands are indexed and cannot be repeated.In addition to these protection features, the secure external memory has to be protected from interface abuse – man-in-the-middle modifications and eavesdropping. To facilitate this, the communication bus between SoC and memory is encrypted and authenticated. Read, write, erase, and configuration change commands are encrypted and signed so that the SoC can authenticate and verify the freshness of data coming from the memory against modifications. The memory device can ensure that write, erase, and configuration change commands did indeed originate from the SoC and that they are not replayed by an adversary.Winbond's secure flash for PP0117 certified secure subsystemsWinbond's W75F family of EAL5+ certified secure flash devices is designed for the requirements of PP0117. The secure flash devices allow efficient usage of the flash storage by allowing:• Secure, encrypted and authenticated interface between SoC and Flash• Strong, 128-bit symmetric key• Non-volatile monotonic counter implemented in the flash to prevent replay and roll-back and maintain data and code freshness• Strong counter measures against side-channel, fault injection and anti-hammering• Stored data integrity protection• Execution in place (XIP) from the flash, minimizing needed RAM size and increasing security by eliminating need to clear text code image in RAM• Multiple writes per byte• Composite certification readyCompared to an OTP-based counter implementation in the SoC when using passive memory, the secure flash from Winbond has potentially unlimited cycles of data update. The monotonic counter in the Winbond secure flash is incremented only once every power cycle, compared to OTP-based designs, where in many cases, each write of a new data set to the flash requires an increment, consuming more OTP fuses.Developing a PP0117-compliant solution with Winbond's secure flash is significantly more straightforward. The evaluation process becomes faster and simpler, and users can anticipate a smoother path to certification since the design eliminates the need for complex passive memory sharing and protection techniques.For more information on how Winbond can support your security and compliance needs, visit Winbond's website or contact Winbond directly, or download the latest Hardware Security White Paper.

SK Hynix Inc. (or "the company", www.skHynix.com) announced today that it presented a new DRAM technology roadmap for the next 30 years and the direction for a sustainable innovation at the IEEE VLSI symposium 20251 held in Kyoto, Japan.1IEEE VLSI (Institute of Electrical and Electronics Engineers Very Large Scale Integration) symposium: One of the most prestigious academic events in the field of semiconductor circuit and process technology, presenting academic achievement in next-generation semiconductors, AI, memory chips, and packaging. The symposium is held in turn in the US and Japan annually.Cha Seon Yong, CTO (CTO) of SK Hynix, delivered on June 10th a plenary session on "Driving Innovation in DRAM Technology: Towards a Sustainable Future".In his speech, CTO Cha explained that it is increasingly difficult to improve performance and capacity with scaling through the current technology platform2. "In order to overcome such limitations, SK Hynix will apply the 4F² VG (Vertical Gate) platform and 3D DRAM technology to technologies of 10nm level or below with innovation in structure, material, and components," he said.2Tech Platform: A technological framework that can be applied to various generations of productsThe 4F²3 VG4 platform is a next-generation memory technology that minimizes the cell area of DRAM and enables high integration, high speed, and low power through a vertical gate structure.34F²: The area occupied by one cell, a unit to store data, is indicated as F2. F indicates the minimum feature size of a semiconductor. Therefore, 4F2 is an integration technology to put more cells in a chip in which one cell occupies an area of 2F by 2F.4VG (Vertical Gate): A structure in which a gate, which acts as a switch of a transistor, is vertically placed and surrounded by channels. Currently, it is a flat structure where a gate is laid horizontally on top of channels.Currently, 6F2 cells are common, but by applying 4F2 cell and wafer bonding technology that puts the circuit part below the cell area, cell efficiency and electrical characteristics can be improved.CTO Cha also introduced 3D DRAM as the main pillar for the future DRAM along with VG. CTO Cha said that although some in the industry warn of cost increase according to the number of layers stacked, it can be solved by constant technological innovation.Along with structural breakthroughs, the company will also strive to find a new growth engine by sophisticating technologies of critical materials and components of DRAM to lay the foundation for the next 30 years."Until around 2010, DRAM technology was expected to face limitations at 20nms, but with constant innovation, we have made it this far," said CTO Cha. "SK Hynix will continue to guide the future of long-term technological innovation to be a milestone for young engineers in the field of DRAM and maintain cooperation within the industry to bring the future of DRAM into reality."On the last day of the event, Joodong Park, vice president who leads the Next Gen DRAM TF, will present his findings from a recent research on how VG and wafer bonding technology affect the electrical characteristics of DRAM.