For more than two decades, data center electrical power distribution operated as a highly standardized, mature, and slow-moving engineering discipline. The architecture of new-generation AI racks integrates more AI GPU/ASIC dies and multi-terabit SerDes switching fabrics into dense footprints. Consequently, rack power requirements are experiencing a massive paradigm shift.
During the peak deployment of the NVIDIA Hopper and Blackwell architectures, individual server frames like the GB300 NVL72 reached around 140 kW. The data center horizon is pushing straight into the Vera Rubin and Feynman generations; individual rack power requirements are soaring to 600 kW+ for Rubin Ultra and are mathematically certain to exceed the 1 Megawatt (1,000 kW) per rack ceiling by 2028–2030.
The rapid growth of generative AI and large language models (LLMs) has fundamentally changed these assumptions. Modern AI clusters are no longer limited by processor performance alone. Instead, system architects must simultaneously optimize computing density, memory bandwidth, interconnect capacity, thermal management, and energy delivery within increasingly compact rack-scale systems. As a result, power consumption is increasing at a pace that significantly exceeds historical infrastructure design assumptions.
The Wide-Bandgap Semiconductor Opportunities in AI Data Centers and Power Infrastructure
SiC and GaN with Their Competitive Edges in AI Power Infrastructure
Chart 5: The Role of SiC and GaN in AI Data Center and Power Infrastructure
Evaluation of the Competitiveness between Si, SiC, and GaN Devices in AI Racks
Chart 6: The Competitiveness of SiC and GaN Devices inside AI Racks
Market Potential for SiC and GaN Devices in AI Data Centers and Power Infrastructure
Chart 7: AI Data Center & Power Infrastructure Opportunities for SiC and GaN
