CONNECT WITH US
Aug 24, 11:05
Nvidia server prices to rise up to 17% as memory costs climb
Prices for some Nvidia-based server systems due for delivery in 2027 are set to rise by more than 15%, with certain flagship configurations increasing about 17%, as higher memory and other component costs feed through to next-generation data center infrastructure.
Xiaomi is expanding its in-house semiconductor push from smartphones into AI acceleration and autonomous driving, unveiling three Xring processors that deepen its reliance on TSMC manufacturing while reducing dependence on external chip suppliers.
The memory industry is undergoing a structural shift as AI demand surges, and Etron Technology chairman Nicky Lu said the sector's boom will stretch beyond 2027, with shortages likely lasting through 2028 and possibly into 2030. He said supply is tightening further as AI and edge computing create rigid demand, pushing the supply chain to focus on higher-value applications.
TPK Holding is accelerating its move from consumer touch panels into semiconductors, with its Through Glass Via (TGV) pilot line in Taoyuan, Taiwan set to begin operations in August or September. The company is also working with leading outsourced semiconductor assembly and test (OSAT) providers on the project, while its new Thailand production base aims to complete trial runs by year-end and begin volume production in early 2027.
Rising demand for artificial intelligence (AI) computing is driving a new wave of technological transformation in the semiconductor industry, while energy is emerging as the next bottleneck for the AI sector. Applied Materials group vice president and Taiwan president Eric Yu pointed out that semiconductor technology competition in the AI era can no longer focus solely on performance and transistor counts. How to support more computing with less energy will become the core of the next stage of semiconductor innovation.
As hardware demands for artificial intelligence continue to surge, beyond increased size and complexity in chip packaging, advanced packaging substrates face mounting challenges: larger package footprints, higher layer counts, lower warpage, and higher accuracy. However, relying solely on incremental upgrades to traditional manufacturing processes is hitting a physical wall. This bottleneck is compelling the industry to evaluate next-generation core layer materials.
Nvidia reportedly struck a US$6 billion deal with startup Poolside to license its technology and hire much of its staff. The technology and personnel will reportedly support the chipmaker's Nemotron models in a bid to compete with China's strength in open-source models, but the deal also puts Nvidia in competition with some of its biggest customers.
SK Hynix is moving on several fronts as it pushes deeper into system-level memory competition. From high-bandwidth memory (HBM) and high-bandwidth flash (HBF) to a recently published roadmap proposing to extend co-packaged optics (CPO) to the memory interface, the company increasingly appears to be competing not just over the next generation of HBM, but over how future artificial intelligence (AI) systems organize and access memory.
Fujifilm has completed a new production building at its Oita Factory in Japan to make post-CMP cleaners, expanding capacity for materials used in advanced semiconductors amid rising global demand for AI chips. For readers worldwide, the move underscores how chip supply chains are adapting to support data centers, connected devices, and next-generation computing.
India is preparing a new capex-based subsidy scheme to support domestic polysilicon manufacturing, as the government seeks to reduce import dependence and build a more integrated solar supply chain.
SEMI launched a semiconductor materials alliance on August 21, bringing together more than 400 companies to build a more resilient and competitive supply chain as Taiwan extends its position as the world's largest semiconductor materials consumer for a 16th straight year.
Rapid changes in the power and thermal requirements of AI accelerators are forcing data-center designers to incorporate chip-level information earlier in the planning process, according to Cadence Design Systems. This is narrowing a gap that once separated semiconductor development from facility engineering.