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Wednesday 21 October 2026
CXMT's next DRAM milestone: 4F² server memory with hybrid bonding by end-2026
Chinese DRAM maker CXMT is targeting higher-density manufacturing. At a recent shareholder meeting, management pledged to enter what it called the "uncharted territory" of extreme...
Monday 19 October 2026
IBM and Siemens collaborate to advance nanostack chip architecture
IBM and Siemens will collaborate on research to develop IBM's nanostack transistor architecture, aiming to move its design toward manufacturing. The work could influence chip performance,...
Friday 16 October 2026
Chinese chip toolmakers buy into hybrid bonding as Huawei looks beyond transistor shrinking
China's largest chip equipment makers are buying their way into hybrid bonding, the advanced packaging step that global players from Besi to ASML are also chasing. For Chinese firms,...
Wednesday 14 October 2026
Huawei's Kirin 9050 Pro delivers 53.5% density gain; tighter 3D bonding next for 2027
Huawei has begun mass-producing its Kirin 9050 series with LogicFolding, a 3D chip architecture that improves transistor density and computing efficiency without relying solely on...
Tuesday 13 October 2026
Column: From 3D NAND to 3D DRAM — how vertical stacking is reshaping memory chip manufacturing
After 2013, planar NAND flash memory began reaching its scaling limits at the 15–16nm process node. Capacitive coupling between the floating gates of adjacent memory cells increasingly...
Tuesday 6 October 2026
Huawei's Kirin 9050 Pro reveals new logic folding chip design
Huawei's Kirin 9050 Pro has been fully broken down by Chinese and overseas researchers, giving the market a closer look at the company's "LogicFolding" approach. Analysis from Geekerwan...
Friday 2 October 2026
China turns to 3D packaging to push AI performance beyond front-end scaling limits
Chip-performance gains have long been driven by an industry-wide focus on shrinking transistor nodes and tightening integration. While major economies including the US and Taiwan have...
Wednesday 23 September 2026
Nexperia China turns 12-inch wafers into the backbone of its chip supply-chain reset

Nexperia China is accelerating production on its domestic 12-inch wafer platform as it rebuilds a locally controlled semiconductor supply...

Thursday 17 September 2026
Exclusive: China's CAS institute charts DUV route to 3nm GAA without EUV
China's advanced semiconductor research has reached another milestone. The Institute of Microelectronics of the Chinese Academy of Sciences has established a gate-all-around (GAA)...
Wednesday 16 September 2026
Interview: Forget transistors — speed is what's choking the chip supply chain, says Qnity exec
The global surge in AI demand is accelerating change across the semiconductor industry, and as Moore's Law scaling faces physical limits, chipmaking is no longer only about shrinking...
Tuesday 8 September 2026
Huawei Kirin 9050 Pro puts LogicFolding to the test with 55% density gain, 66% lower NPU power
Huawei's Kirin 9050 Pro is the first commercial test of its Tau Scaling Law, with the company claiming a 55% increase in transistor density at the same process node while cutting NPU,...
Monday 7 September 2026
Naura 3D DRAM etching breakthrough could give CXMT a new path beyond EUV
China's Naura Technology has demonstrated a selective etching process for 64-layer 3D DRAM structures, potentially giving domestic memory makers another route to raise transistor density...
Monday 7 September 2026
Huawei Kirin 2026 challenges 3D chip heat limits with Tau Scaling Law
Huawei is using measured data from its upcoming Kirin 2026 processor to challenge a key concern around vertically stacked logic: that higher transistor density inevitably brings more...
Thursday 3 September 2026
TRUMPF targets advanced packaging as AI chip makers chase higher density, better cooling
As AI chips grow more powerful, the race is shifting beyond transistor scaling to packaging, glass substrates, and thermal control. For global readers, that means the next gains in...
Tuesday 1 September 2026
Rising Packaging Complexity Elevates Glass in Semiconductor Manufacturing

As transistor scaling becomes more difficult and costly, advanced packaging has become one of the most important paths for extending Moore's Law. Technologies such as...