Bits + chips
TEL deepens collaboration with customers to embrace opportunities in AI era
Grace Lee, DIGITIMES, Taipei

The emergence and convergence of AI, IoT, cloud, and autonomous driving technologies have brought tremendous opportunities to the semiconductor industry. However, as the process technology moves towards 7nm/5nm nodes, heterogeneous integration, and 3D structures, there are many challenges in the industry to be resolved.

At this year's Semicon Taiwan, Akihisa Sekiguchi, deputy division general manager of Corporate Innovation Division at Tokyo Electron Limited (TEL), a leading semiconductor equipment company, gave a speech on the topic of "Semiconductor Equipment in the Era of Internet of Cognitive Entities," sharing his views on the latest trend. He stressed that TEL will strengthen cooperation with customers to overcome various technical challenges, so that the industry can continue to enjoy the cost reduction benefits at advanced nodes and to realize the vision of smart life in the AI era.

Opportunities and challenges coexist in the semiconductor industry

With the spread of IoT technology, the age of AI/big data has begun. A large amount of data generated by each node needs to be stored, processed, transmitted and analyzed, therefore pushing up the demand for various semiconductor devices, including memory, logic, sensors, and the emerging AI chips. It is expected that the trend will drive the long-term growth of the overall industry, and for this year, the semiconductor production equipment market has set a new record of US$60 billion.

"From the computer to the mobile era, by process scaling, the industry has been able to keep growing and meet consumers' demands for smaller, cheaper, and better products," Sekiguchi said. "But now we are at a turning point. If we want to continue this successful model in the AI era, we need new breakthroughs in both chip design and process technology."

First of all, in terms of chip design, so far the AI function is mainly used in the cloud. But the long-term growth brought by AI cannot be made possible if the deep learning/inference functions are not prevalent across every IoT nodes.

At present, many companies are investing in GPU, FPGA, and ASIC chips for this. In addition, a brand new kind of neuromorphic chip, which adopts non-Von Neumann architecture, has been actively developed. This is a new revolution for the existing CMOS circuits and CPU architectures, in a bid to accelerate the realization of AI applications by providing several orders of magnitude enhancement of performance, cost and power efficiency.

This is because different AI algorithms require different hardware solutions, and the traditional way of making processors faster is no longer enough. New architecture, integration and system optimization are required to meet the different needs of cloud and edge devices. Therefore, a variety of new AI-optimized chips/devices will show up in the market. And TEL is working with multiple partners to address the AI development needs.

In addition, in terms of process technology, DRAM, NAND and logic devices are all facing the increasingly difficult challenge of process scaling, which must be solved by adopting new materials and moving to 3D architecture.

For DRAM, scaling has become increasingly difficult as the capacitor aspect ratio increases to be over 50 at D16 node. As for NAND, the implementation of 3D structure has enabled continued scaling. "But we are now talking about over 100 layers of different materials stacking. How to keep dimension consistency from the top to the bottom, it's a daunting task," said he.

"For logic scaling, thanks to the progress of lithographic technology, we are able to keep scaling as EUV is ready to be used at 7nm node. But in terms of process complexity, we have to deal with the problems from planar to FinFET, high-K, and to nanowire and nanosheet at 5nm below."

When fabricating these tiny 3D structures, maintaining the uniformity and consistency of operation is very important. From the capability side of equipment, atomic level control of processing is a must at leading edge technology nodes.

Winners are those who can keep driving down the cost

Scaling capability limitation and growing demand for devices occurring at the same time means the cost is an issue. Though the industry can always get the performance required by utilizing innovative technologies and new materials. But now the question is that is it the end of cost scaling?

Sekiguchi is optimistic about this, saying, "We don't believe that it is the end of cost scaling but it is true that cost is a big factor. FinFET is a performance requirement and as we have progressed through several nodes of its development, production issues are being ironed out. If anything, the introduction of EUV can have a positive effect in terms of reducing the manufacturing cost by making EUV plus dual patterning the solution for patterning instead of SAQP for example. To some effect, the dependence is on EUV throughput and cost effectiveness. Of course, for 3D NAND, the dependence is not on lithography, rather it is on how many device layers we can stack. There it is deposition and etch productivity that will determine cost scaling."

"Though it's hard, the problems can be solved, provided that the industry as a whole works together to solve it systematically. And the winners in the future will be those who can still enjoy the benefits of cost-effectiveness at advanced nodes, who are the end users of our products," he stressed.

"As process technologies get increasingly complicated, every customer may have different requirements. We need to collaborate with each customer to provide the specialized solution they need, and the commodity tools can't fit anymore. In particular, new materials and its chemistry play an important role in creating these tiny structures. From the front-end process of devices build all the way to contact, wiring, to the back-end packaging, the considerations for processes are all different. Therefore, equipment vendors should understand all these issues. And for that we need to understand integration better, just like our customer needs to understand our tools' capability better as well."

On the other hand, tool efficiency is also a key factor to the cost scaling. In order to improve equipment productivity, it's an inevitable trend to migrate to smart manufacturing by adopting AI and data analytics. "The ability to analyze vast amounts of data is important and critical. By implementing smart analysis of information, scheduling of events within the semiconductor device fabrication factory can be optimized and production performance improved. On the equipment side, the concept of tool health monitoring and predictive maintenance coordination are fairly well known, and we continue to work on these solutions on a customer-by-customer basis to meet their specific requirements."

Finally, he stressed that the competition in the semiconductor production equipment market is very fierce. "We need to help customers reduce the cost of operations. Therefore, we aim to keep competitiveness in the market by responding to diversity, constantly pursuing higher efficiency, and deepening cooperation with customers."

Dr. Akihisa Sekiguchi, Deputy Division General Manager of Corporate Innovation Division, TEL

Akihisa Sekiguchi, deputy division general manager of Corporate Innovation Division, TEL
Photo: Grace Lee, Digitimes, September 2018

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