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Altera schedules 65nm FPGA pilot run in 2H 2006

Kathryn Chiu, Hsinchu
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Altera expects to enter test production of field-programmable gate arrays (FPGAs) using 65nm technology – working with Taiwan Semiconductor Manufacturing Company (TSMC) – in the second half of 2006, with volume production to commence in 2007, according to François Gregoire, Altera’s vice president of technology.

Altera has been collaborating with TSMC for two years and a team of 200-300 staff from both companies have been involved in the planning, Gregoire said.

The two companies have finished developing Altera’s 90nm and 0.13-micron FPGAs and the company is confident it will stick to its development schedule for its 65nm FPGAs, as the production procedures for 90nm and 65nm are similar and the only issues are lowering the required power and resolving leakage issues, Gregoire indicated.

Altera has already validated its mid-to-high-density FPGAs using 90nm technology (Stratix 2) from TSMC’s first 12-inch wafer fab and will start evaluating the same products at TSMC’s second 12-inch wafer fab, Gregoire added.

Article translated by Carrie Yu and edited by Michael McManus