Synopsys said growing demand for artificial intelligence chips from semiconductor companies and hyperscale data center operators is driving broader adoption of its electronic design automation (EDA), hardware-assisted verification, and intellectual property (IP) products, supporting a higher fiscal 2026 revenue outlook and reinforcing the company's position in AI-related semiconductor development.
The company raised its fiscal 2026 revenue guidance midpoint to US$9.665 billion from US$9.61 billion after reporting second-quarter revenue growth of 42% year over year to US$2.28 billion. Management said US$35 million of the guidance increase came from business performance, with additional contributions from the Ansys channel, partially offset by the sale of processor IP solutions.
AI demand lifts EDA and verification tools
During the earnings call, CEO Sassine Ghazi said demand strength extended across the company's portfolio as AI-related semiconductor development accelerated.
"We saw strength across the business," Ghazi said. "The key driver for the strength is the continued AI semiconductor from a chip point of view, opportunities that our customers are seeing and therefore translating into chip start or design start."
He said both semiconductor suppliers and hyperscale cloud companies developing their own chips were contributing to demand growth.
"For us, it's a great opportunity on both ends, on the semiconductor suppliers as well as the hyperscalers," Ghazi said. "For any of these designs, you will need EDA software, you need hardware-assisted verification to verify the chip in the context of the software, and IP for any chip start, you need IP."
Ghazi added that Synopsys was also seeing rising demand for system analysis and simulation tools tied to advanced chip packaging technologies.
"Most of these chips are advanced packages; thermal is essential, all the physics simulations like fluid structure, et cetera are essential," he said. "So we're seeing the strength across the portfolio."
IP rebound gathers pace
The company's IP business, which accounts for roughly one-fifth of revenue, showed signs of stabilization after recent weakness. Ghazi said sequential improvement was supported by existing customer engagements and by growing activity in AI and high-performance computing chips.
"The current IP sequential improvement is based on the pipeline that we've had and closing the engagements that we could see in our forecast with the existing business model that we have with our customers," he said.
Ghazi said Synopsys was seeing stronger engagement around new business models involving hyperscalers building AI accelerators and high-performance computing systems.
"Where you are seeing a strong confidence and enthusiasm in the engagements around the new business model, in particular in HPC and the AI-based chips with the hyperscalers," he said.
CFO Shelagh Glaser said part of the expected sequential improvement in IP revenue would come from the availability of additional product titles later in the fiscal year.
"As we move the resources to more fully deploy on HPC, there's title availability that becomes available as we move throughout the back half of the year," Glaser said.
AI chip starts leave industrial peers behind
Synopsys also said AI-related chip development continued to outpace activity in industrial and automotive semiconductors.
Ghazi said the company closely tracks "chip starts" and "design starts" across end markets and was seeing the strongest growth in AI-related projects.
"What we are seeing is a chip start increase or a design start increase in anything AI-related," he said.
He said industrial and automotive customers had reported improving revenue trends, but that had not yet translated into a comparable rise in semiconductor design activity.
"The design starts are not growing — definitely not growing at the pace as we're seeing for the other cohort," Ghazi said.
He added that some analog semiconductor companies were showing increased interest in technologies linked to "physical AI," including sensors and actuators that connect real-world systems with digital computing.
"From a design start, it's still fairly muted design start activity in that domain," he said.
Custom silicon opens new IP frontier
Management also highlighted growing opportunities tied to hyperscale companies designing proprietary AI accelerators for use in their own data centers.
Asked whether a recent hyperscaler AI accelerator tape-out marked a first for Synopsys, Ghazi said the company was already engaged with multiple cloud providers at different stages of chip development maturity.
"In each one of these engagements, Synopsys IP, hardware, EDA, portfolio is in use," he said. "There are none of the COT that do not use the EDA, HAV, IP, and S&A."
Ghazi said the increasing complexity of custom AI chips was creating opportunities for more advanced and customized IP offerings.
"As these customers are moving to more sophisticated, complex COT, they need to make sure they have a customized IP, the latest IP that is competitive with what they get from merchant silicon," he said. "And that's the opportunity we're seeing that is expanding."
Article edited by Jerry Chen
