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Taiwan foundry overview - 4: Moving towards integrated services

Jack Lu, DigiTimes.com, Taipei
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In face of global competition, major Taiwan foundries are being prompted to provide value-added services, and these are then gradually transformed into forms of vertical integration. Rather than pure IC production, first-tier Taiwan foundries are providing integrated solutions either with in-house services or via alliances with downstream back-end suppliers or IP providers.

At an analyst meeting in October of 2003, TSMC chairperson Morris Chang stressed that capacity is not the most important factor in the foundry business. Instead, technology, service, and manufacturing capabilities will decide a company’s strength in the long term.

In a November 2003 investors conference, Kenneth Kin, vice president for worldwide sales and marketing at TSMC, said the company no longer sees itself as a pure manufacturer but a service provider with more complete solutions. In addition to wafer production, TSMC has also made progress in photomask and IC-back-end services. The company has set up a new joint venture, VisEra Technology, with OmniVision Technologies to offer back-end services for image-capture ICs and modules.

Having seized over half of the photomask market in Taiwan with its in-house services, TSMC has shipped over 100 photomask sets based on its 90-nm process. As well, it processed, last year, over 1,000 products featuring 0.13-micron technology. It did this via the company’s Cyber Shuttle program, which places multiple ICs on a single wafer for prototyping, TSMC said.

For back-end processes, TSMC has been offering solder bumping services for 12-inch production since the third quarter of last year. It has also been jointly developing lead-free bumping technology with some testing and packaging providers, the company said.

UMC also offers value-added services including online supply chain management, multi-project wafer test program, in-house IC packaging and testing. In addition, the company offers free-of-charge silicon-proven IP libraries for chip designs range from 0.25- to 0.13-micron process technologies.

In addition, both TSMC and UMC have been working with LCOS component and systems manufacturers to provide LCOS backplane manufacturing services.

TSMC and UMC: value-added services

Companies

Services

Functions

TSMC

eFoundry

Web-based support for wafer design, engineering and logistics.

Design Service Alliance

An alliance to provide third-party libraries, intellectual property (IP), EDA, and silicon validation services for system-on-chip (SoC) design.

In-house Design Service Division (DSD)

In-house IP portfolio compatible with TSMC’s sub-0.18-micron processes.

Cyber Shuttle

Multiple chip prototyping with single photomask set.

In-house mask production, packaging and testing services

 

UMC

MyUMC

Online supply chain management solution

Chipsizer

JAVA-based software allowing designers to estimate chip size with selected IPs

Silicon Shuttle

Multi-project wafer test program.

In-house test and packaging

 

Free of charge IP libraries from 0.25- to 0.13-micron processes

 

Source: companies, compiled by DigiTimes, September 2004.

Article edited by Zoran Pavlovski