At COMPUTEX 2025, ASUS showcased its comprehensive AI infrastructure solutions, targeting the computing needs of data centers, edge computing, and a wide range of intelligent applications. With a robust product portfolio, ASUS brings to life the NVIDIA AI Factory vision, illustrating how AI will be deeply embedded into enterprise IT infrastructure. This evolution continues to drive forward applications and services that shape the future of AI and high-performance computing

Linxens, a global leader in component-based solutions for authentication and traceability, and Dracula Technologies, a pioneer in ambient light energy harvesting, have announced a strategic collaboration to develop next-generation autonomous IoT solutions for traceability and smart labelling applications. This collaboration paves the way for smarter and more sustainable connected devices

Technology news, product launches and show highlights from the event attendees available for download (PDF).

Smiths Group plc ("Smiths") announces that it has entered into an agreement for the sale of Smiths Interconnect to Molex Electronic Technologies Holdings, LLC ("Molex", a Koch company) (the "Transaction"). The Transaction values Smiths Interconnect at an enterprise value of £1.3bn, representing 15.1x headline EBITDA of £86.1m1 for the fiscal year 2025. Smiths will receive cash consideration for the Transaction which is subject to customary adjustments for working capital, cash and debt. This announcement demonstrates clear progress against the strategic actions announced on 31 January 2025, designed to maximise value creation, unlock value in the portfolio, and enhance returns to shareholders. The sale of Smiths Interconnect is a notable step forward in the strategy to become a more focused industrial engineering company. Completion of the Transaction is expected to take place in the second half of fiscal year 2026.Credit: SmithsAs also announced in January, Smiths is executing against the delivery of enhanced returns to shareholders through its ongoing £500m buyback which is expected to complete by the end of calendar year 2025. Smiths remains committed to returning a large portion of disposal proceeds from the sale of Smiths Interconnect to shareholders and intends to maintain an investment grade credit rating with the desire to have an efficient balance sheet.  The Board of Smiths will provide an update on the use of proceeds in the Q1 FY2026 Trading Statement scheduled for release on 19 November 2025. Smiths continues to progress with both the sale and demerger processes in parallel for Smiths Detection, as previously stated.Roland Carter, Chief Executive of Smiths, said: "This is an important step as we deliver on our commitment to focus Smiths and unlock the inherent value in our business. Today's announcement, and our recent results, show we are delivering on our strategy with pace and purpose and I am confident that we will continue to do so as we further focus our business as a high-performing industrial engineering company.""We thank our Smiths Interconnect colleagues for their significant contribution to the Smiths Group over many years and wish them every success as they transition to their new owner, Molex, who is well placed to support their future growth."Under French employment laws, prior to making any decision to enter into the Transaction (including by way of entry into any binding share purchase agreement), Smiths is required to carry out an information and consultation process with its French works council (the "French Works Council"). It is intended that the consultation process regarding the Transaction will begin following this announcement.Whilst Smiths will ensure the views of the French Works Council are properly considered, the French Works Council opinion on the Transaction is consultative and not binding on Smiths or Molex.Following completion of the consultation with the French Works Council, the agreement that Smiths has entered into gives it the unilateral and unconditional right to require Molex to enter into a binding share purchase agreement to complete the Transaction, which is subject to the satisfaction of customary conditions and regulatory approvals.Based on headline FY2025 EBITDA, which excludes the contribution from the US sub-systems business unit of Smiths Interconnect, which was reported as agreed for sale in Smiths full year 2025 results, and which completed in October 2025.

As digitalization penetrates every industry-whether in cloud computing, telecommunications infrastructure, automotive electronics, or IoT devices-the security of hardware platforms is no longer an isolated concern of a single sector, but a common challenge faced by all critical infrastructures. In the past, the focus of cybersecurity was largely placed on software.However, as attack methods continue to evolve-from supply chain infiltration and firmware tampering to chip-level exploits-the security and resilience of hardware have come to be recognized as a fundamental cornerstone of modern security architectures. At the heart of this shift, Secure Flash Memory is increasingly emerging as the critical enabler across diverse application domains.Evolution of International Standards: Hardware and Firmware Security FrameworksIn recent years, international standards and certification frameworks for hardware and firmware security have gradually formed a tightly interwoven network. Among them, the NIST SP 800-193 Platform Firmware Resiliency (PFR) Guidelines established by the U.S. National Institute of Standards and Technology clearly define three core capabilities: detection, protection, and recovery.These requirements mandate that platforms be capable of identifying anomalies, blocking unauthorized updates, and securely restoring firmware when necessary. Initially widely adopted in servers and networking equipment, SP 800-193 is now regarded as a cornerstone for defending against firmware-level attacks.However, relying on a single framework alone is insufficient to address the diversity of application scenarios. To provide a more flexible and scalable approach that covers varying product types and market demands, the Security Evaluation Standard for IoT Platforms (SESIP) was introduced. Designed specifically for IoT and embedded platforms, SESIP emphasizes a modular approach to security evaluation.By decomposing security functionalities into reusable security claims, SESIP not only improves certification efficiency but also allows manufacturers to reuse existing security assets across product lines, avoiding the need to start from scratch for each market-specific requirement. This flexibility has made SESIP a critical tool in today's rapidly expanding landscape of IoT and smart devices.To learn the latest cybersecurity regulations and trends, download the hardware security whitepaper for free.The Convergence of Industry Standards: Common Criteria, FIPS 140-3, and ISO/SAE 21434At the same time, other international security frameworks continue to exert their influence. Common Criteria (ISO/IEC 15408) remains one of the most widely recognized global security evaluation systems, providing stringent assurances for smart cards and critical infrastructure devices. FIPS 140-3, mandated by the U.S. government, sets clear requirements for the security of cryptographic modules, covering encryption, key management, and physical protections, and has been broadly adopted in finance, government, and cloud services.Additionally, ISO/SAE 21434, originally designed for the automotive sector, introduces a risk-based approach to cybersecurity lifecycle management. While its initial focus was on automotive electronics, its methodology is increasingly being extended to other safety-critical domains, highlighting the growing convergence of cross-industry security standards.Though these standards originate from different perspectives, they share a common foundation: ensuring the establishment of a Root of Trust, safeguarding firmware and cryptographic keys against tampering, and enabling systems to recover quickly after an attack.This is precisely where secure flash memory demonstrates its value. The latest generation of secure flash memory devices typically integrate multiple security mechanisms, such as secure boot support, immutable key storage, hardware-based authentication, and cryptographic accelerators.These features allow secure flash memory not only to meet the firmware integrity requirements of NIST SP 800-193 but also to align with the cryptographic module protections defined in FIPS 140-3 and to complement the modular security claims of SESIP. In other words, secure flash memory is not just a solution for one certification, but rather a bridge across multiple international standards.Practical Applications: Secure Flash Memory in Different Industry SegmentsFor example, in the server domain, secure flash memory ensures that both BIOS and BMC firmware are verified during startup, blocking any unauthorized modifications in real time-a direct embodiment of PFR principles. In IoT devices, the same memory can be evaluated through SESIP, modularizing secure updates and key management, thereby enabling shared security foundations across different product lines.In financial services or cloud platforms, the built-in cryptographic engines of secure flash memory directly support the requirements of FIPS 140-3, providing a trusted environment for key storage. In automotive electronics, these memories can be incorporated into the threat modeling and risk management frameworks outlined in ISO/SAE 21434, supporting end-to-end lifecycle security management.Secure Flash Memory as the Engine of Cross-Industry Digital TrustIt can therefore be said that the role of secure flash memory has moved far beyond being a mere data storage component; it has become the tangible foundation of a system’s Root of Trust. It is the essential vehicle through which security standards are realized and the shared language that enables cross-industry collaboration. As industries worldwide continue to raise the bar for cybersecurity, the ability to effectively integrate and align with multiple international standards will determine whether products can successfully enter the market and earn end-user trust.Looking ahead, as supply chain security challenges intensify—from manufacturing to system integration to end applications—the demand for security will only continue to grow. With its unique ability to span across multiple standards, secure flash memory is poised to remain the cornerstone of digital trust in industry. It is not merely a technological option, but a strategic necessity for companies seeking to maintain competitiveness and compliance in the global marketplace.To learn more about Winbond's advanced security solutions, visit Winbond's website or contact Winbond directly, or download the latest Hardware Security White Paper.

Artificial intelligence (AI) is reshaping the semiconductor landscape-both as a fast-growing end market and as a catalyst for innovation across mobile, automotive, networking, industrial and beyond. Taiwan's industry leaders are at the forefront of this transformation, proactively developing next-generation packaging technologies critical to AI semiconductor content.AI workloads are driving demand for specialized chip architectures that can process massive amounts of data quickly and efficiently. In data centers, high-performance AI chips-such as GPUs or AI accelerators-support large-scale model training and inference for applications like AI chatbots. At the edge, devices rely on high-efficiency chips like NPUs to enable real-time decision-making in applications such as autonomous vehicles, smart cameras and mobile devices.This shift in computing architecture depends on advanced packaging. By enabling higher performance and power efficiency through a tighter integration of compute and memory, advanced packaging supports the sophistication and scale of modern AI chips. Taiwan's expertise in advanced packaging and its expansive semiconductor supply chain are accelerating this shift.Why Heterogeneous Integration is Key to PerformanceMoore's Law scaling is becoming more expensive due to the complexity needed to keep increasing transistor counts. As a result, innovation is diversifying. Technologies like high numerical aperture extreme ultraviolet (high-NA EUV) lithography and new transistor designs such as gate all around (GAA) continue to push traditional scaling. Developments with backside power delivery (BPDN) are improving overall raw performance by providing a more stable power supply. Breakthroughs in semiconductor packaging are now playing an increasingly pivotal role.Semiconductor packaging has evolved beyond protecting and connecting chips to powering device performance. At the heart of this shift is heterogeneous integration-the ability to combine multiple chips or chiplets in a single package. This modular approach offers a flexible, cost-effective way to integrate diverse functions in packaging instead of on a single chip, to meet requirements without relying solely on traditional scaling.Advanced Packaging Technologies Enabling AIAI chips are growing in complexity, with some expected to contain up to a trillion transistors per package by the end of the decade. Advanced packaging supports this growth through system-level integration of compute and memory.High bandwidth memory (HBM) plays a key role. By stacking memory vertically and placing it close to the GPU, HBM reduces latency and boosts data transfer speeds while lowering power consumption. Interposers and substrates facilitate efficient communication between components. In many modern AI designs, hundreds of logic and memory chips are integrated into a single high-value package to meet specifications.Credit: KLATo support the growing architectural demands and evolving semiconductor chip requirements, the industry is advancing 2D, 2.5D and 3D packaging architectures-where 2D places chips side-by-side on a substrate, 2.5D arranges them on an interposer and 3D stacks them vertically. Technologies like hybrid bonding, embedded bridges, wafer- and panel-level interposers, glass core substrates and co-packaged optics help to increase interconnect density and improve system performance. These innovations provide new ways to shorten signal paths to increase bandwidth and reduce power loss-critical for AI workloads.Advanced Packaging Innovation Brings Manufacturing ChallengesAs packaging complexity increases, so do manufacturing challenges. More chip designs per package, larger die sizes, smaller features, denser interconnects and new materials all raise the bar for packaging yield management.Credit: KLAWith more components and interconnects placed into a single package, the number of potential failure points increases. A single chip or interconnect defect can compromise the entire multi-die package-resulting in costly yield loss. In this environment, tighter process control becomes essential to ensure high yield and reliability.Heterogeneous integration brings challenges similar to those found in front end semiconductor manufacturing, demanding greater defect sensitivity and tighter metrology precision. KLA addresses these challenges with a comprehensive portfolio of advanced packaging process control and process-enabling solutions-for wafers, panels and components – designed to scale advanced packaging complexity without compromising quality.Evolving 2.5D and 3D packaging architectures create new yield challenges that need improved process and process control solutions.Credit: KLAAI Needs Intelligent IntegrationThe semiconductor industry is anticipated to reach US$1 trillion globally by 2030, according to PwC in November 2024, driven by a wide range of applications-including the rapid growth of AI from data centers to edge devices. AI demands high compute capacity with optimized power use, pushing the boundaries of semiconductor chip design and integration. Taiwan’s semiconductor manufacturers welcome these opportunities.It's widely recognized that 90% of the world's advanced semiconductors are produced in Taiwan, contributing to a combined semiconductor output value that exceeded NT$5 trillion in 2024, up 22.4% from 2023, according to statistics released by the Industrial Technology Research Institute (ITRI). Global demand for AI chips is surging.AI is also driving a diversification of semiconductor content. Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) provide higher power density, faster switching, and better thermal efficiency than silicon, making them increasingly important for efficient power delivery in AI systems.In data center and HPC environments, AI growth is also pushing development in photonics and co-packaged optics for network switches to improve data transfer speeds and energy efficiency. Quantum computing, still in early stages, could eventually reshape how complex AI workloads are processed.Across these domains, advanced packaging serves as the foundation for uniting diverse technologies into compact, high-efficiency systems. Taiwan technology leaders are driving this advanced packaging innovation, and KLA is proud to serve as their collaborative partner.2025 marks the 35th anniversary of KLA's operations in Taiwan. Headquartered in the United States, KLA is a global leader in semiconductor inspection and metrology, with over 15,000 employees worldwide. The expertise and insights cultivated at KLA Taiwan over three decades, in partnership with our valued customers, underscore a commitment to technical excellence in the AI era-when chip manufacturing requirements are more complex and challenging than ever before.The future of semiconductors isn't just about smaller transistors – it's about smarter integration. Packaging has become essential to performance. At the boundaries of Moore's Law, advanced packaging has emerged as the key to meeting next-generation semiconductor device requirements.With deep expertise in process, process control and customer collaboration, KLA is helping the semiconductor industry build what comes next. As AI redefines what's possible, the technologies that support it must evolve just as rapidly. KLA's dedicated team of engineers, physicists and data scientists embraces the scale and significance of this transformation, helping shape the future of semiconductor innovation in the AI age-where advanced packaging plays a pivotal role.