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Tuesday 2 June 2026
AI Data Center enters gigawatt scale; Power Architecture Emerges as Competitive Edge
As AI data center rapidly scales toward the gigawatt (GW) level, energy management is evolving from a supporting function into a defining strategic pillar. Against this backdrop, Infineon Technologies is redefining power infrastructure of AI era through its comprehensive "From Grid to Core" strategy, integrating energy efficiency, power density, and system resilience from the electrical grid to the processor core.Scaling AI: Strategic Power Solutions MatterThe evolution of artificial intelligence (AI) has accelerated far beyond the trajectory once predicted by Moore's Law. As AI models continue to expand in parameter scale and real-time inference becomes increasingly critical, demand for computing power is rising at an unprecedented pace.Today, the power consumption of a single GPU is rapidly approaching the kilowatt level, and the power density of a server rack has increased significantly from less than 60kW in the past to exceeding 100kW, now moving toward a new threshold in the megawatt range.This is not just numerical growth; it represents a fundamental shift in power architecture. As AI computing clusters expand rapidly, traditional 48V busbars and AC power distribution architectures are quickly approaching their physical limits in terms of power loss, thermal management, and spatial constraints.Adam White, President of Infineon's Power & Sensor Systems Division, emphasized that future competition in AI infrastructure will no longer be limited to chip performance. Instead, it will be a cross-disciplinary integration battle encompassing power electronics, materials technology, and system architecture.From Grid to Core: Rethinking the power delivery architectureAt this critical turning point for the industry, Infineon's competitive advantage lies not in a single breakthrough product, but in its ability to orchestrate and optimize the entire power delivery chain at the system level."From Grid to Core" is more than a product strategy - it is a multi-phase architectural framework designed to reshape the future AI energy chain. Developed through early collaboration with global hyperscalers and ecosystem partners, the strategy enables Infineon to address evolving AI power demands across every phase of infrastructure, from utility grids to processor-level power management.Power grid: Enabling a sustainable, high-efficiency power with HVDCAt the front end of the data center, power infrastructure is transitioning from traditional mechanical systems to highly integrated solid-state solutions. Future AI facilities are expected to increasingly adopt decentralized DC microgrids, enabling greater efficiency, flexibility, and resilience in energy management.By leveraging silicon carbide (SiC) technology in solid-state transformers (SSTs), system weight can be dramatically reduced - from nearly 20 tons to approximately 500 kilograms—while simultaneously improving overall energy efficiency by more than 1%. Beyond optimizing space utilization and operational costs, this advancement signals a broader industry migration from electromechanical infrastructure toward semiconductor-driven power systems.As SSTs and related technologies become integrated into AI power infrastructure, a multi-billion-dollar semiconductor opportunity is emerging across next-generation energy systems.At the same time, the power grid is evolving beyond its traditional role as just an energy source. Through digitally controlled power systems with real-time monitoring and remote management capabilities, combined with solid-state circuit breakers (SSCBs) featuring microsecond-level response times, the grid is becoming an intelligent energy platform capable of continuous optimization and predictive management.Server rack: Reshaping power density and maximizing efficiencyAs data centers advance toward GW-scale deployments, power distribution architecture is undergoing a fundamental redesign. Infineon is driving the industry's transition from traditional 48V systems to ±400V and 800V high-voltage DC architectures. Through the design of three-phase power sidecars, Infineon is restructuring power supply and computing systems to establish a more efficient and flexible power distribution model.At the same time, the power architecture of AI data centers is following a clear evolutionary path: moving from integrated server rack designs to high-voltage DC and sidecar power supply configurations, and ultimately advancing to gigawatt-scale infrastructures that incorporate DC microgrids.Meanwhile, The high-frequency characteristics of gallium nitride (GaN) components enable intermediate bus converters (IBCs) to achieve over 98% conversion efficiency and exceptionally high power density in an extremely compact form factor, significantly reducing power transmission losses and freeing up more space for AI computing resources.Processor core: Power density and new architectures for next-gen AI computeAt the processor core—the final stage of power delivery—the challenge shifts toward managing extreme current density and ultra-fast transient response.To support next-generation GPUs requiring massive current delivery and rapid load transitions, Infineon has introduced a digital multiphase PWM controller alongside the industry's first TLVR four-phase power module. These technologies are engineered to provide highly stable, efficient, and responsive power delivery for AI processors operating under increasingly demanding workloads.In response to the next generation of GPUs demanding ultra-high current and rapid load changes, Infineon has introduced digital multiphase PWM controllers and the industry's first TLVR quad-phase module. By leveraging high-precision telemetry and digital control technologies, power systems have transformed from energy suppliers into intelligent platforms capable of real-time monitoring, prediction, and optimization.From AI data center to physical AIIf data centers form the foundation of AI computing power, the physical world will be where AI's true value is ultimately realized. As AI increasingly expands into humanoid robots, autonomous systems, and intelligent manufacturing equipment, demands for energy efficiency, real-time responsiveness, and system reliability will become even more critical.Infineon is extending its long-established expertise in power management beyond data centers into the emerging era of Physical AI. By integrating sensing technologies, actuate, security and connectivity solutions, and high-efficiency power modules, the company is enabling a comprehensive functional blocks that empower humanoid robots to perceive, think, act and connect, safely and secured in a real-world environment.Push the boundaries of power technology in AI era"We Power AI" is not just a slogan for Infineon—it is a concrete commitment to the future of the industry. From gigawatt-scale data centers to physical AI, Infineon continues to push the boundaries of power technology, ensuring that every watt of energy is transformed into the greatest possible value for AI.As the industry advances toward the next generation of computing, energy management will become the decisive key to truly unlocking the full potential of AI. In this wave of transformation, Infineon is joining forces with ecosystem partners to stand at the forefront of defining the future.Editor's Note: Adam White will deliver a keynote address at COMPUTEX 2026 on June 4 titled  "Infineon Powering AI from Grid to Core to Physical AI."  The session will explore emerging trends and strategic opportunities in power infrastructure of AI era.Credit: Infineon
Tuesday 2 June 2026
AI Inference Revolution: Wallace Kou on Memory Shifts
The global semiconductor landscape is undergoing a fundamental shift, moving from a focus on raw training power to the practical complexities of large-scale deployment. In an in-depth interview, Wallace Kou, President and CEO of Silicon Motion, detailed how the generative AI has evolved beyond its initial stages. While the market's early gaze was fixed almost exclusively on NVIDIA's GPUs, the High Bandwidth Memory (HBM), and the CoWoS advanced packaging technology, Kou argues that the industry is now entering the "Inference" era that is turning previous under-estimation about storage's importance on their head.The Shift from Training to InferenceThe turning point for this realization occurred during the NVIDIA GTC conference in March 2026. CEO Jensen Huang unveiled the Vera Rubin architecture, a move that signaled a massive spike in demand for NAND flash memory. During the initial AI boom, the industry was preoccupied with training massive models, a process that relies heavily on the lightning-fast throughput of HBM. However, as these models move into the inference phase - where they are actually used by end-users to generate content or solve problems - the access to context, historical data, and massive datasets storage become the primary bottleneck.Kou notes a dramatic shift in market sentiment. Only two years ago, storage was often an afterthought in the AI conversation; today, it is a critical scarcity. "There is currently not a single global cloud service provider or major smartphone manufacturer whose demand for DRAM and NAND is being fully satisfied," Kou observed. This supply-demand gap has triggered a financial windfall for storage module manufacturers and memory giants, with some stock prices skyrocketing up to tenfold as the market reacts to persistent shortages and rising prices.Technical Paradigm Shift: CMX and the Infrastructure of ThoughtAt the heart of this transition is a new architecture introduced by NVIDIA: the CMX Context Memory Storage platform. This architecture is designed specifically to handle the "KV Cache" (Key-Value Cache), which allows AI models to remember the context of a conversation or a complex task during the inference process.The hardware requirements for the CMX architecture are staggering in their scale and technical demands. Each individual Rubin GPU requires 16TB of dedicated storage to function effectively within this framework. At a system-level scale, a single NV72 Vera-Rubin setup can demand more than 1 Petabyte, or 1,000 Terabytes, of total storage capacity. Beyond mere capacity, the CMX architecture facilitates direct GPU access to storage, a feature that bypasses traditional latency bottlenecks and ensures that AI inference remains fluid and responsive.While this creates a massive commercial opportunity for the storage industry, it also places an unprecedented strain on NAND production. Kou emphasizes that this is not just a cloud-based phenomenon. The explosion of Edge AI - AI processed locally on devices - is further complicating the supply chain. For instance, driven by major players like Meta, the market for smart glasses is expected to reach 60 million units this year. These wearable devices require high-performance embedded storage, creating a secondary front in the war for NAND capacity.Silicon Motion's Role: Solving the QoS BottleneckAs the world's leading NAND controller maker, Silicon Motion sits at the intersection of these competing demands. The primary technical challenge in modern AI environments is maintaining Quality of Service (QoS). In a multi-tenant cloud environment, where multiple GPUs are accessing shared storage simultaneously for different inference tasks, data transfer speeds can often fluctuate or drop.To solve this, Silicon Motion has deployed its proprietary PerformaShape technology. This technology ensures that even under heavy, concurrent workloads, the transmission speed remains stable. By stabilizing these data flows, Silicon Motion has positioned itself as an "indispensable stabilizer" in the AI ecosystem.Beyond data path optimization, Silicon Motion is also extending its role into system-level infrastructure by providing enterprise-grade boot drives for leading AI GPU, TPU, and DPU platforms, ensuring system reliability and fast initialization at scale.The Crisis of Imbalance: Kou's "Capacity Persuasion" EffortsDespite the record-breaking revenues, Kou is deeply concerned about the "shadows" lurking behind this prosperity. The current memory market is suffering from a dangerous imbalance. To maximize profits and satisfy the insatiable hunger of AI cloud giants, major manufacturers like Samsung, SK Hynix, and Micron are funneling the majority of their capital expenditure (CAPEX) into HBM and DDR5 production.This strategic pivot has effectively "squeezed" the production capacity available for standard NAND flash. Kou warns that this "AI squeezing effect" could lead to a collapse in traditional sectors. Over the past eight months, Kou has embarked on a global mission, meeting with leaders at Samsung, SK Hynix, Kioxia, SanDisk, YMTC, and Micron. His message is one of "capacity persuasion": he is urging these giants to reserve a portion of their production lines for the automotive, PC, and smartphone industries."If these foundational industries break because they cannot find parts, Edge AI will have no 'soil' to grow in," Kou warned. He believes that a total focus on the high-margin AI server market could eventually backfire, destroying the broader technology ecosystem that supports AI development.A Stabilizing Strategy: From Cloud to EdgeSilicon Motion is positioning itself as the "transition enabler" for an industry in flux amid an expected 2–3 year supply shortage. As NAND manufacturers concentrate their internal resources on AI-driven initiatives, they are increasingly outsourcing non-core and mainstream projects, such as PCIe Gen5 controllers and embedded solutions. In this shift, Silicon Motion has emerged as a preferred partner to fill the resulting gap.At the same time, as rising prices weigh on demand in the PC and smartphone markets, the company is helping customers pivot toward automotive and AIoT applications, including rapidly growing segments such as smart glasses, which are seeing a surge in shipments this year.One of the most critical areas is the automotive sector, where Silicon Motion has spent a decade building a presence. While memory giants might see automotive requirements as "niche" or low volume compared to AI servers, Kou views them as essential to global stability. When major OEMs consider abandoning these specialized demands due to capacity constraints, Silicon Motion steps in to ensure the global automotive supply chain does not grind to a halt."We are not just looking for a surge in revenue; we want to fulfill our responsibility to the industry," Kou said. By providing stable controllers and storage solutions for AIoT and automotive applications, Silicon Motion is effectively repairing the cracks in a fractured global supply chain.Future Outlook: 2027 and BeyondThe current supply-demand imbalance is not a temporary glitch but a structural reality that Kou expects to persist until at least late 2027 or 2028. Several factors make it nearly impossible to add capacity quickly, for example, land acquisition is increasingly difficult. The lead time for building specialized cleanrooms and procuring critical equipment now exceeds one year.Kou predicts that while the DRAM shortage might begin to ease by the end of 2027, the relief for NAND will likely come even later. In this high-pressure environment, Silicon Motion's role as a key stabilizing force becomes increasingly important.Particularly in emerging sectors such as smart IoT and automotive applications, Silicon Motion delivers reliable controller and storage solutions, filling the vacuum left by production shifts at major manufacturers or by projects lacking sufficient engineering support.By helping global clients navigate the complexities of geopolitics and capacity wars, Silicon Motion aims to ensure that the AI revolution leads to a steady, sustainable future rather than a chaotic collapse of the broader tech industry.AI inference boom fuels supply-demand imbalance until 2027-2028, says Wallace Kou. Credit: Silicon Motion
Wednesday 27 May 2026
Quality Innovation Powering AI: ZEISS Makes COMPUTEX Forum Debut
ZEISS, a global leader in optics and optoelectronics, will bring the quality discussion to the official COMPUTEX 2026 Forum stage for the first time this year, highlighting the growing role of quality in scaling AI hardware.As demand for AI infrastructure accelerates, quality is shifting from a manufacturing support function to a direct driver of performance, yield and delivery readiness. While public attention often centers on AI models, ZEISS says reliable hardware execution is becoming a decisive factor in AI deployment.Behind every AI interaction are massive data centers powered by thousands of GPUs. As systems scale from chip to rack, defects in semiconductor packaging, printed circuit boards (PCB/A), cooling systems and high-speed interconnects can affect uptime, deployment speed and total cost."With compute demand surging, manufacturers face record orders, but the challenge is delivering at scale with consistent quality," said Clive Yen, Global Head of Electronics Customer Segment, ZEISS Industrial Quality Solutions. "As systems grow more complex, quality becomes critical to reliable deployment. This is why we work across Taiwan's ODM ecosystem and the full AI server value chain to enable consistent, scalable quality.""At scale, even small defects can become major bottlenecks," said Tonmoy Kundu, Global Head of Sales, ZEISS Research Microscopy Solutions. "Manufacturers need faster insight, tighter process control and trusted failure analysis to accelerate next-generation AI hardware."ZEISS says it offers one of the industry's most comprehensive quality portfolios across the AI hardware value chain, supporting customers from semiconductor packaging and PCB inspection to liquid cooling, optical connectivity and final rack integration.At the forum, ZEISS will showcase solutions for advanced high-bandwidth memory (HBM), where rising stack heights and shrinking interconnect dimensions require high-resolution, non-destructive inspection and deep defect analysis.The company will also present metrology solutions for co-packaged optics (CPO), where ultra-tight tolerances for FAU and MPO connectors are essential to maintain alignment, coupling efficiency and long-term transmission reliability in 51.2T+ networks.At the exhibition hall (Booth J1109 | TaiNEX Hall 1, Taipei), ZEISS will showcase technologies spanning wafer process control, advanced packaging, X-ray inspection, electron microscopy, light and digital microscopy, and coordinate measuring machines. Applications will focus on chip manufacturing, PCB reliability, thermal management systems, connector quality and L10-L11 rack mechanical parts assembly.COMPUTEX 2026 runs June 2-5 in Taipei, where ZEISS will position quality as a foundational enabler of the next wave of AI growth. ZEISS will speak at the official COMPUTEX 2026 Forum on June 4, 4:30 p.m. to 4:55 p.m. at TaiNEX 2, Room 701, presenting "Quality Innovation Across the AI Chip-to-Rack Stack." The session will feature Tonmoy Kundu and Clive Yen.