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Tuesday 21 July 2026
SemiQa: New materials for faster, energy-efficient analog processing
Pursuing a PhD might have been the most lucrative decision that Tomasz Matusiak has ever taken.Whilst studying at the Wroclaw University of Science and Technology in Poland's third-largest city, he developed chemical sensors made from ceramic materials based on microplasma generators, and electrical components made from a paste of glass and graphite. Now, Matusiak is using this research to solve a bottleneck that plagues the cutting edge of AI development: moving data between where it is stored in memory and where it is handled in the processing unit (for example, the central processing unit [CPU], which handles arithmetic and logical operations; or more specialised graphics processing units [GPUs], which handle computer graphics and digital images) wastes both time and (electrical) power. This limits the extent to which AI models can be scaled up and, of course, harms the environment.What if one could perform all of the computational tasks right where the data are stored? Matusiak thinks his material can do this, and he has started a company, SemiQa, and produced a system inspired by the human brain, the Analog Neural Network (ANN). Unlike conventional chips, which can reach 80°C and require a cooling system, his ANN system only reaches a maximum of 40°C. SemiQa's goal since its inception at the start of 2025 has been to conquer the universe of data centres, replacing their graphic cards (and the GPUs that power these graphic cards) with ANNs.Matusiak wants to bring back analog processing for its computational advantages. He uses the analogy of a train ride through the countryside. One might look outside the window and see a forest pass one by, followed by a short section alongside a river, before heading back into the forest again. A human brain – the analog system – would see a forest and then not think about it again until it sees a change in the environment (the river), and then once again not actively register the river again until the river has been replaced by the forest. It only processes the changes.But a digital system would constantly process what is outside the window. Analog processing thus saves on energy as it doesn’t process when there hasn't been any change.Likewise, digital processing might allocate a large number of bits to a small integer – for example, even though the number 5 can be expressed in binary with just three bits (101), it might be stored in an 8-bit or a 16-bit structure, where most of the surplus bits are zeroes. Many of the operations performed on these small integers will also result in small integers, so most of the leading zeroes will not change. A lot of memory is wasted.Analog processing can get around this problem by simply storing the 5 in a memory cell as a 5 instead of in eight memory cells as 00000101. (Analog memory cells, unlike digital memory cells, can take on more values than just 0 and 1.)The neural approach is based on a special electrical component called a memristor (short for memory resistor). A traditional resistor follows Ohm's Law, which states that the current (the rate at which electric charge flows) through a conductor is proportional to the difference in voltage (or the difference in electric potential energy, or the work it would take to move a unit of charge provided by, for instance, a battery) across that conductor. Mathematically, Ohm's law is V= IR, where V stands for the voltage, I for the current, and R for the resistance of the conductor, a proportionality constant that indicates how difficult it is for charge to move. The higher the resistance, the lower the current (for a given level of voltage).In a traditional resistor, the resistance doesn't vary with current (or voltage). In a memristor, though, the resistance depends not just on the current (or voltage) but also on the past levels of current running through it (or voltage controlling it). In other words, if the voltage goes up and then goes back down to its earlier level, the current and resistance might not return to their original levels. This ability to take on a range of values of resistance also mean that the memristor can be analog – in other words, that it can represent a range of values and not just a 0 or a 1.In addition to its superior thermal properties, SemiQa's ANN1000 is more power-efficient than other chips, being able to carry out more than 30 TOPS (or 30 trillion operations per second) per Watt of power; standard GPUs or NPUs (neural processing units, which are specialised for AI applications) can only carry out 1-2 TOPS per Watt. (The chip consumes 2.5 Watts of power, and so can carry out roughly 75 TOPS.)It is also naturally faster – ANN1000's latency (the time delay between when the processor requests something from memory to when the processor retrieves it) is 50 times shorter than that of a conventional GPU or NPU.The next step is, of course, commercial-scale production of their chips. They already demonstrated a proof-of-concept of their memristive technology at last year's SEMICON Taiwan, an annual trade show and Asia's largest semiconductor event. They will now create a neural network on silicon and hope to have a product-ready chip tailored to specific applications by the end of 2027. The memristive material, a mixture of organic and inorganic parts, is compatible with CMOS (complementary metal-oxide-semiconductor) technology, which is commonly used in foundries to fabricate chips. Matusiak envisions SemiQa's chips in mission-critical applications where efficient power consumption and processing is highly advantageous. These include autonomous systems, such as drones to be used in war and marine robots. Electric cars can also benefit: GPUs currently account for roughly half the cost of driverless vehicles, and replacing conventional GPUs with SemiQa's chips could reduce the price for consumers whilst maintaining manufacturers' margins. SemiQa also plans to add B2B applications such as data centres to the aforementioned B2C applications. They will tackle this through the ANN2000, a matrix of a thousand smaller ANN1000s.The prize money from the Best AI Awards pales in comparison to the 3 million EUR in pre-seed funding that SemiQa has already raised in Europe. But Matusiak is most grateful for the recognition that the judges have given his company's achievements since they started it just a little more than a year ago. This will also facilitate their collaboration with potential partners – in fact, they are already in talks with two local foundries to deepen their co-operation and scale up production of their chips."If you want something special, you need to work with the special forces," says Matusiak. "Everyone knows that Taiwan is the best in the world."SemiQa also plans to set up a branch office in Taiwan and will potentially hire two business developers in the country in the short term. They also know that they will need more funding, and are looking into perhaps raising money from Taiwanese investors. SemiQa already has a strong relationship with Taiwan, being a member of the Taiwan-Poland Chamber of Commerce and having signed memoranda of understanding with several Taiwanese businesses.The Best AI Awards celebrate global excellence in artificial intelligence and IC design, welcoming submissions from innovative companies and brilliant student teams. Following the success of the 2026 edition—advised by the MOEA, organized by DoIT, and executed by TCA—the prestigious competition is officially transitioning into an annual tradition.Offering substantial grand prizes and unmatched industry exposure, the countdown to Best AI Awards 2027 has already begun. Details on the next submission cycle, prize tiers, and eligibility rules will be released soon. Connect with us on LinkedIn for the latest official updates and application alerts. 
Tuesday 21 July 2026
Inferara: Secure, real-time verification of AI-generated code and content
By now, it's common knowledge that artificial intelligence has sped up coding and is now replacing junior software engineers. But can you really trust the code that AI produces?The answer is a clear no. Programmers are still needed to review the code for bugs of all sorts. Maybe the code hallucinates, meaning that it has the right syntax and looks plausible but attempts to, for example, import a library that doesn't exist. Maybe there are functional bugs, where the code simply produces the wrong result because of a faulty algorithm and these are just the simple errors.Moreover, companies are naturally hesitant to release sensitive or proprietary information, such as customer data, to an AI coding tool.Inferara wants to solve these problems. It wants to give you code on which you can rely, free from any vulnerabilities, and it does this by reformulating the code into mathematical notation. This is all done on the user's own computing infrastructure, so that no code or data is ever shared externally.Georgii Plotnikov is the CEO and CTO of Inferara. Originally from Russia, Plotnikov had been working as a software developer for a decade after graduating from university. Roughly five years ago, he started learning more about static code analysis, which can be likened to a real-time spell-checker for code: it is, essentially, early detection for any bugs or security vulnerabilities in the code.He started developing an idea for a new way to turn static code analysis into a mathematics problem at the end of 2023. Around the same time, he started to explore where he could settle down and legally incorporate his company. Plotnikov decided on Japan, sent his business plan and other documents to the country,s government, and after being awarded a startup visa, moved there in the summer of 2024. (Inferara is a relatively young company, incorporated only in October 2024.)Unlike many AI companies, which focus on their product and want to get them out to market as quickly as possible, Inferara is proud to call itself a research-first company. Its main product is not the code checker but rather Inference, which he describes as "a programming language that uses mathematics to ensure code works exactly as intended".This is also known as formal verification, and being formally verified gives programmers and users an additional layer of assurance that, for instance, cryptographic protocols will keep data secure, or that compilers for programming languages will not make mistakes. It's also important for mission-critical processes, such as those in automated (driver-less) driving systems, financial systems, energy plant controls, and medical devices.In a nutshell, formal verification examines all possible states that the (usually finite number of) variables or parameters can take, in order to ensure that the logic is sound. In contrast, simply testing the system with common values that the variables might take might not reach all possible states, especially as the number of variables increases, and it will definitely not reach all possible states when there are an infinite number of variables (or values that the variables can take).Mathematical proofs can group variables together and reduce the total number of states that need to be explored. They can even use mathematical induction to verify an infinitely large number of states.Traditionally, programmers have needed a sophisticated understanding of mathematical logic to manually perform formal verification. Inferara's Inference programming language performs formal verification as one codes (or as AI codes) and makes it possible for even those with no understanding of mathematical logic to guarantee their code's fidelity. Inference's diagnostics are also developed so that both humans and AI coding agents can interpret them and, thus, use them to improve the code's reliability.Inference builds upon and improves the user experience of using Rocq, a piece of software that can assist in mathematical proofs. Plotnikov says that Inference sets itself apart by working what appears to be slowly. Instead of writing code as quickly as possible, it continually checks the code's correctness as it is being generated. This takes more time but, in the end, is more cost-effective, since it requires fewer calls to AI later on. Plotnikov likens this to the slower, more rational and conscious system of thinking described in Daniel Kahneman's bestselling book Thinking, Fast and Slow.Inferara has now taken the next step beyond Inference: It has created Vibe Checker, an operating system that can encapsulate the entire AI-led code-development process. In addition to its own desktop AI agent, Vibe Checker is compatible with the existing, widely-used coding agents of Claude Code, Gemini, and Codex.Most companies currently using AI-assisted coding typically do so via the cloud (i.e., off-premises). Although the code and data is stored under the programmer's domain, all that information traverses multiple external barriers when being run. Vibe Checker provides its own gateway, comprising its own server and the user’s own cloud computing security model (also known as bring-your-own-encryption, bring-your-own-key, or BYOK). Vibe Checker's most data-secure services will host everything on users' own infrastructure, and is appropriate for those users who have the resources to buy their own hardware. There is total data sovereignty: no data ever leaves the user's infrastructure, nothing is ever uploaded to Inferara's servers, and everything can be run even without internet access. An audit trail also logs every action taken by a coding agent.Vibe Checker does more than just check code. It's a multifunctional checker, or task-agnostic, and can audit any AI-generated system for functional errors and security vulnerabilities. Law firms can use it to summarise case files and contracts; researchers and policy analysts can use it to verify their database queries; finance departments can check their tax filings; hospital clinicians can manage their patient records; and banks and insurers can double-check their regulatory submissions.Privacy is essential in all of these aforementioned applications, and Vibe Checker enables on-premise analysis with links and citations referring back to the original source of the information – in other words, no hallucinations.Plotnikov says that Inferara will clearly benefit from the 500,000 NTD prize money from the Best AI Awards. However, the most important reward is the valuable feedback from those working in the industry, telling them that what they are doing makes sense and has commercial value. The award will also help Inferara get its name out and allow them to approach and demonstrate their technology to potential partners; in fact, Inferara is currently in discussions with several companies in Taiwan. In particular, they are interested in working with Taiwan's semiconductor and chip industry, which can provide the hardware supply chain for their product.In the next few months, they plan to deploy Vibe Checker to several companies who will serve as beta-testers, including several Taiwanese companies. They also intend to establish a legal entity in Taiwan, and have plans to work with the Centre of Industry Accelerator and Patent Strategy (IAPS) at the National Yang Ming Chiao Tung University.The Best AI Awards celebrate global excellence in artificial intelligence and IC design, welcoming submissions from innovative companies and brilliant student teams. Following the success of the 2026 edition—advised by the MOEA, organized by DoIT, and executed by TCA—the prestigious competition is officially transitioning into an annual tradition.Offering substantial grand prizes and unmatched industry exposure, the countdown to Best AI Awards 2027 has already begun. Details on the next submission cycle, prize tiers, and eligibility rules will be released soon. Connect with us on LinkedIn for the latest official updates and application alerts.
Monday 20 July 2026
PGC Boosts COT Model, Integrates TSMC Ecosystem for ASIC Growth
As artificial intelligence (AI), high-performance computing (HPC), high-speed networking, and edge computing applications continue to expand rapidly, global demand for custom ASIC solutions is rising at an unprecedented pace. Faced with the escalating design complexity and development costs associated with advanced process nodes at 6/5/4/3nm, balancing time-to-market, cost efficiency, and production quality has become a critical challenge for IC design companies and system vendors worldwide.PGC (TPEx: 8227), with over 35 years of expertise in ASIC design services, is a member of the TSMC Design Center Alliance (DCA) and a Synopsys IP OEM Partner. With a track record of more than 1,500 tape-out projects and over 100 tape-outs completed annually, PGC delivers comprehensive capabilities spanning advanced-node design, APR (Automatic Place and Route), back-end design services and tape-out foundry services, and volume production ramp. In response to growing market demand for advanced-node ASIC development, PGC announces the further enhancement of its Customer-Owned Tooling (COT) business model, integrating ASIC design services, IP resources, and semiconductor supply chain ecosystems to help customers shorten chip development cycles, accelerate tape-out, and rapidly secure engineering samples and production capacity.COT Business Model: Balancing Design Ownership with Development EfficiencyThe COT business model enables customers to retain ownership of critical design assets — including IP, EDA tool licenses, and design data — preserving their core intellectual property and technical autonomy while leveraging PGC's professional ASIC design team and proven design flows to jointly complete chip development. Compared to traditional turnkey models, COT effectively reduces long-term NRE (Non-Recurring Engineering) investment, eliminates vendor lock-in, and enhances flexibility for product iteration, multi-project development, and cross-generation platform continuity.In practice, customers adopting the COT model have achieved development cycle reductions of over one month, along with long-term NRE cost savings of more than 10%, giving them greater autonomy and strategic flexibility in product planning and technology roadmap execution.Synopsys IP OEM Partnership: Lowering IP Licensing Barriers and Accelerating DevelopmentAs a Synopsys IP OEM Partner, PGC provides customers with comprehensive Synopsys IP licensing and integration services. Customers can flexibly incorporate market-proven, high-quality IP based on project requirements, simplifying licensing processes, lowering upfront investment thresholds, and accelerating IP integration and verification through PGC's expertise — further shortening ASIC development cycles and time-to-market.ASE Packaging and Test Integration: Bridging Design to Volume ProductionIn the area of packaging and test, PGC has established a close collaboration with ASE Group, integrating advanced packaging and test resources to provide customers with comprehensive production support from wafer to finished product. This collaboration covers BGA, Flip Chip, and Wire Bond packaging and full test services, helping customers accelerate production ramp while ensuring shipping quality and reliability.One-Stop Solution: End-to-End Support from Design to Mass ProductionBeyond ASIC design services, PGC offers a diverse range of prototyping options, including TSMC CyberShuttle (suited for early-stage design verification, leveraging multi-project wafer sharing to reduce prototyping costs) and VIS (Vanguard International Semiconductor) MPW (suited for specialty process or mature node requirements), enabling customers to complete engineering sample verification with maximum flexibility.PGC delivers a comprehensive one-stop solution encompassing ASIC design, IP integration, APR, DFT, tape-out, prototype verification, packaging and test (OSAT), and volume production ramp,complemented by professional back-end design services  and complete tape-out foundry services, helping customers rapidly obtain engineering samples, complete product validation, and seamlessly transition to mass production, significantly compressing time-to-market.PGC CEO Fred Lai stated: "In a market environment where AI and HPC applications continue to drive demand for advanced-node solutions, customers need more than a design service provider — they need a comprehensive partner capable of integrating IP, design, prototyping, and volume production. By enhancing our COT business model and deepening our three-way ecosystem collaboration with TSMC, Synopsys, and ASE, our goal is to help customers reduce their ASIC development cycles by more than 10%, bringing innovative products to market faster."Looking ahead, as demand for AI inference chips, HPC accelerators, and high-speed networking ASICs continues to grow, PGC will continue to expand its advanced-node service capabilities and further extend its customer reach into the US market, empowering global customers to seize opportunities in the advanced-node semiconductor landscape.PGC Boosts COT Model, Integrates TSMC Ecosystem for ASIC Growth. Credit: PGC