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Chiplet and advanced packaging for AI chips

Eric Chen
Eric Chen, Analyst
Advanced packaging will drive AI chip performance upgrades, with new routes emerging in both materials and packaging architectures.
Abstract

The rising costs of AI chips driven by advanced process technologies have continued to escalate, while the direct performance gains from these process improvements have significantly diminished. Consequently, cost-effective advanced packaging has emerged as a key focus in the semiconductor industry.

DIGITIMES believes that combining chiplets with advanced packaging technologies will be a critical strategy for enhancing the performance of high-end AI accelerators in the future. Furthermore, the integration of new materials, such as glass and silicon carbide (SiC), along with the development of novel techniques like co-packaged optics (CPO) and fan-out panel level packaging (FOPLP), will further drive the advancement of AI chips.

DIGITIMES notes that while advanced processes remain the primary method for upgrading AI chips, they are not the sole solution. Advanced packaging technology enabling heterogeneous integration between advanced chips and functional chips is gradually playing a critical role.

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Published: October 29, 2025

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