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News tagged wafer-level packaging
  • Last update: Tuesday 9 July 2013 [19 news items]

High-end packaging next battlefield for IC assembly and test services providers, says Amkor executive

Jul 9, 15:53

Robust growth in smartphone usage is encouraging semiconductor assembly and test services providers to head towards related packaging technologies. Amkor Technology is already among...

Kevin Yu, Amkor sales director for Greater China

STATS ChipPAC to pump another US$500 million into expansion in Singapore

May 29, 11:19

STATS ChipPAC has unveiled plans to invest another US$500 million to expand its operations in Singapore, where the IC backend house is headquartered.

Scientech deepens development of 3D IC, wafer-level packaging equipment

Jan 31, 16:04

Taiwan-based semiconductor equipment distributor Scientech has deepened its development of 3D IC packaging and wafer-level packaging equipment, expecting some of its equipment to...

ChipMOS expects sales growth in 2012

Mar 19, 16:15

Packaging and testing firm ChipMOS Technologies has forecast consolidated revenues for 2012 will increase 10%. The company revealed that net revenues on a US GAAP basis for 2011 grew...

Aptos expanding 12-inch wafer level packaging business

Mar 14, 14:30

Aptos Technology, which specializes in backend services for the production of NAND flash chips and devices such as microSD cards, announced March 13 that two of its subsidiaries will...

STATS ChipPAC intros new 3D eWLB PoP solutions

Mar 7, 11:35

STATS ChipPAC, a semiconductor test and advanced packaging service provider, has announced its next-generation three dimensional (3D) embedded wafer-level ball grid array (eWLB) package-on-package...

STATS ChipPAC breaks ground for new factory

Jan 6, 01:20

STATS ChipPAC on January 5 hold a groundbreaking ceremony for its new factory in Singapore, according to the chip test and packaging service provider. The new 197,000-square foot...

Focus on small, cost-effective packages: Q&A with STATS ChipPAC CEO Tan Lay Koon

Nov 21, 13:48

Despite uncertainties in the semiconductor industry outlook, packaging and testing firm STATS ChipPAC will continue investing in advanced IC packages for space-critical designs that...

STATS ChipPAC CEO Tan Lay Koon

STATS ChipPAC to open new wafer-level packaging plant in Taiwan, says paper

Newswatch - Nov 14, 16:40

STATS ChipPAC is scheduled to hold an inauguration ceremony for a 12-inch wafer bumping and wafer-level packaging plant in Hsinchu County, northern Taiwan, Thursday (November 17),...

PTI developing advanced packaging technologies

Jul 1, 01:10

Packaging and testing firm Powertech Technology (PTI) expects the development of new technologies including wafer-level packaging, 3D IC packaging and copper pillar bumping to bear...

ASE aims at global market share of 25-30% in 2014

Jun 29, 01:00

IC packaging/testing service provider Advanced Semiconductor Engineering (ASE) aims to hike its global market share from 17-18% in 2010 to 25-30% in 2014, COO Tien Wu said at the...

STATS ChipPAC expands WLP offering with 12-inch manufacturing in Taiwan

Jan 18, 12:00

STATS ChipPAC has announced the expansion of its wafer-level package (WLP) offering with new 300mm manufacturing capabilities in Taiwan. The 300mm WLP operation is located in Hsinchu...

ASE to budget US$700 million in capex for 2011, says paper

Newswatch - Oct 4, 17:00

IC packaging and testing house Advanced Semiconductor Engineering (ASE) plans to budget US$700 million in capex for 2011, flat on year, an unnamed company executive has been cited...

STATS ChipPAC opens new plant for 300mm eWLB wafer manufacturing

Sep 15, 15:33

STATS ChipPAC on September 15 celebrated the opening of a new manufacturing facility to process 300mm wafers using embedded wafer-level BGA (eWLB) technology. The Singapore-based...

SPIL enters LED packaging market

Sep 14, 15:26

Siliconware Precision Industries (SPIL) has entered the LED packaging business and started LED shipments through wirebonding packaging technology to three US-based clients. It is...

Aptos invests in ACE to enhance wafer-level package offering

Nov 30, 16:51

Aptos Technology, a 20%-held packaging and testing affiliate of Phison Electronics, has announced it recently acquired an 87% stake in wafer-level packaging (WLP) house Advanced Chip...

Plant fire at KYEC affiliate ACE, reports paper

Newswatch - Oct 7, 16:57

Advanced Chip Engineering (ACE), a wafer-level packaging and testing house which has investment from King Yuan Electronics Company (KYEC), suffered a fire on the second floor of a...

STATS ChipPAC expanding capacity for wafer-level packaging

Jun 17, 14:35

STATS ChipPAC has announced it is expanding capacity for full turnkey wafer-level packaging in its Singapore operation. The IC packaging and testing service provider said it is on...

Integrated handheld solutions driving demand for wafer-level packaging, says ASE

Apr 13, 16:00

Handheld devices incorporating functionality such as Bluetooth, FM radio, GPS and Wi-Fi have become the market driver for wafer-level packaging (WLP), Taiwan's Advanced Semiconductor...

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