Supply chain
Towards a micro-oriented and speed-focused smart era: A design solution of micro-controllers and embedded platforms for tablets
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Thursday 19 July 2012

Frankwell Lin, the President of Andes Technology Corporation and a veteran with years of experience in market observation, said despite mainstream in the personal computing market has evolved from the single type of open-architecture PC products to various closed embedded devices like smartphones, tablets, digital TVs, smart grid and telematics in an era with all sorts of consumer products and applications, "speed-focused," "micro-oriented" and "smart" features will be the ultimate goals for these products no matter how situation changes.

In addition to the ever-decreasing size of system/SoC, simpler CPU codes for faster computing of device, less power consumption and lower software/hardware manufacturing cost, the new generation of devices starts to enter a new era of being micro-oriented, smart-focused and smart via integration with various sensing/identification/processing and mobile components, user interfaces suitable for mobile/home application, and the omnipresent connected environment (such as London's Urban OS).

New generation of smart devices should enhance power efficiency and support various communications protocols

Lin said in view of this new era, the new generation of consumer devices should support touch screens, auto screen rotation, gesture or voice control, and auto detect/control of outside conditions such as temperature and image. They should also have intelligent features like a feedback mechanism for proper control and monitoring, or capability for schedule-driven activities.

Moreover, indispensable features include versatile connectivity to USB, Ethernet, BT, Wi-Fi and Zigbee, personalized setup, storage and usage of personal data and corresponding security features, and longer battery life with standby and sleep modes.

In order to achieve various requirements of the above-mentioned devices, there must be support from related systems and hardware/software. Andes Technology has developed various CPU IP lines to help vendors transform themselves toward smarter products.

In fact, Andes Technology's AndesCore series has long been welcomed by vendors in the market. N12 and N10 products have also accumulated many successful cases of application in Linux-based devices of networking, virus scan, surveillance, eBook, thin client, portable multimedia, wires display and wires communications.

Most vendors of SSD, eMMC/eSD, Bluetooth and Wi-Fi, as well as those involved in protocol stack, weak leveling, block management, hardware engine control and typical program size larger than 100KB that need CPU to cover, adopt AndesCore because of its high performance and compact code size, said Lin. As for vendors of touch controller and battery gauge/protection, as well as those involved in measure current, voltage, temperature and short circuit, position calculation and perform cell balancing, the appeal is high power efficiency and small gate count.

AndesCore is widely adopted by vendors

Andes Technology estimated that since the launch of the AndesCore series in various specs, about 100 million units of embedded equipment around the world have been based on innovative SoCs built by clients with the company's processor IP products. Lin said this year his company will release the latest AndesStar V3 instruction set and the N13 and SN8 series that are based on the architecture, in an effort to offer more software support and satisfy various market demands from downstream clients.

For example, AndeStar V3 instruction set can support virtual hosting and priority-based interrupt preemption for faster speed and lower power consumption. It also offers all-C embedded programming and more robust debugging. "AndeCore products based on this instruction set have other additional features with different models. For example, N1337 is a product based on AndeStar V3 with 64bit caches.

Compared to the previous instruction set, AndeStar V2, the new V3 made a lot of improvements. In terms of code size reduction, for example, the instruction set features function prolog and epilog, shift followed by ALU operations, branch on small constant, repeated code sequences and V3M for most frequently used V3 subset for MCE. On average, code size can be reduced by 15% after compilation and MCU benchmarks can even achieve at least 20% reduction.

Moreover, V3 instruction set also has many instructions for voice applications required by smart equipment. As V3 instruction set is a reinforced version of V2, the former adds 38 new instructions (19 32-bit and 19 16-bit instructions) on top of strengthened compilation of original instructions. With great backward-compatibility, programs written on V2 are still useable in the new version so there is no need for extra time and cost for re-programming.

AndeStar is more competitive in code size and efficiency

In a comparison between AndeStar and 8051, Lin noted that: when executing 16-bit average computing, 8051's code size can reach 12 bytes and it takes 11 cycles to finish processing, but AndeStar only needs 4 bytes and 2 cycles; in executing 16-bit multiply computing, 48 bytes/48 cycles and 8 byets/8cycles are respectively needed for 8051 under generic and mem-mapped HW modes, while AndeStar only needs 4 bytes and 1 cycle. In terms of code size or efficiency, AndeStar is more competitive than 8051.

CPU-specific features are usually written in assembly language in order to accelerate execution and reduce code size after compilation, said Lin, describing it as a great burden for developers. In view of this, Andes Technology provides component libraries in all-C language for CPU resource management, system startup code and ISR, so that vendors can benefit from simple development, ease of use, reduced code size and faster execution.

Responding to different needs from various applications, AndesCore have diversified its products to achieve greater balance in terms of conflicting execution efficiency, energy consumption and wafer size than other competitors.

For example, there is no need to focus on speed for remote controller, IOT/WSN and power meter. Andes Technology offers N8 series for entry-level equipments smaller than 100MHz. Economic devices in 100-200MHz like MCU, BT/Wi-Fi/GPS, PC peripheral, storage, touch panel and MP3 can adopt N9 series. As for highly-professional/safety control platforms such as switch, gateway, client device, STB, smartphone, smart TV, smart card, NFC and mobile payment, they can also find support from N13 and SN8 series.

Vendors should choose CPU IP carefully

Lin stressed that we are in the emerging phase towards a micro-oriented and speed-focused smart era, and SoC is the key for people to enter this era. So how vendors choose CPU IP for SoC in their products is the core element for future success. Andes Technology has long been devoted to R&D of design solutions to be embedded in micro-controllers since foundation. For instance, Andes N8 is regarded by many IC designing houses as the best solution for upgrade from 8bit MCU to 32bit.

As for tablets, Andes has been proven successful in applications for tablets such as Wi-Fi, Bluetooth, GPS, FM, touch control, power management, etc. Lin believes that with more and more equipment embedded with SoC in people's daily lives, vendors like Andes Technology will play important roles in the future supply chain of the industry.

Frankwell Lin, President of Andes Technology

Frankwell Lin, President of Andes Technology

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