Industrial solid state drives (SSDs) - particularly those that adopt the cheaper MLC flash - are now widely adopted by the embedded industry for major storage applications. But the trend toward miniaturization has been giving SSD development serious problems in terms of data retention, error checking and correcting (ECC) and programming/erase cycle (P/E cycle). Some players have already developed solutions to these technological barriers to enhance product quality and prolong product life.
Industrial SSDs have been adopted by different types of embedded machines and equipment, such as industrial PCs, kiosks, POS, automated teller machines and medical devices. InnoDisk Corporation a company with years of profound experience developing and making flash-based storage devices presented during the Digitimes Embedded Technology Forum in February, with company R&D director C.C Wu noting that unlike the ordinary PC environment, embedded machines and equipment usually work under special environments that call for stricter SSD requirements in terms of quality, shock-resistance, dust-proof, performance, reliability, instant response speed, the range of work temperatures (operational in high and low temperatures) and customization.
"For example, SSD cards for on-board cameras must be able to withstand the bumpiness during rides, as well as a big gap between high and low temperatures; otherwise the recorded images may be lost easily," Wu said. On the other hand, with the fast rise of smartphones, tablet PCs and other mobile devices, the future development of SSDs will continue to follow the main trend in pursuit for stability, low power-consumption and miniaturization. "Products like the world's smallest InnoDisk-developed CF (CompactFlash), CFast, PCIeDOM, mSATA, SATA, SSD, SATA Slim , SATADOM and USB Embedded Disk Card are typical SFF (small form factor) examples," he added.
SSD miniaturization is the growing trend for embedded systems
We can also find proof of SSD's miniaturization trend from the history of the flash chip development. Wu said that historical data shows that flash die nodes shrank fast from 60nm in 2006 to 20nm in 2011, and it is expected to reach 1xnm in 2013. "Flash is becoming smaller and smaller and production is getting cheaper and cheaper - per-GB cost was only US$1 in 2011, but the performance is becoming better and better, enabling good performance of SFF SSD products." He thinks that this is because the most common transmission interface for SFF SSDs on embedded platforms is SATA (Serial Advanced Technology Attachment).
He explained that the maximum transmission speed of conventional PATA (Parallel ATA) is only 133MB/s. But SATA I can reach 1.5Gb/s and the latest SATA III can run even as fast as 6Gb/s. The difference between PATA and SATA is huge. The latest SFF SSDs now all adopt the SATA interface. "Take CF cards for mobile storage purposes for example. In order to meet industrial clients' needs, InnoDisk also has CF-SATA versions that keep the original connector but also feature SATA pins in order to minimize shock impact, improve overall reliability, and increase transmission speed," Wu said. And as there are two interfaces in the same slot, designers can have more options.
Although the issue of performance can be solved, the shrinking of the size of SSD products is giving rise to serious challenges for data retention, ECC and P/E cycle. "The flash chips currently used in SSDs are divided into two types: single-level cell (SLC) and multi-level cell (MLC)," Wu noted.
Wu said that in actual testing, SLC flash is better than MLC in read/write speeds, in P/E cycle (SLC averages 100,000 times and MLC 3,000) and data retention (10 years for SLC and five for MLC). But MLC has double capacity compared to SLC of the same die size from the same technology process, and the former's average price is only one third, and even one fourth in some cases, of the latter's. Therefore many embedded devices that need less P/E cycles (such as POS and kiosks) are starting to adopt MLC chips for storage.
MLC is cheaper but quality is less stable
But unlike SLC, MLC is relatively unstable, and it needs more ECC bits to make sure the data is correct. The shrinking of the devices is worsening such a situation. According to research data, 2xnm MLC flash sees error bits reach 25 when its P/E cycle reaches 7,000 times, while 3xnm MLC's error bits reach the same level only after the P/E cycle reaches 3-50,000 times.
Further analysis shows that "3xnm MLC's error bits steadily remain at 2-3 before reaching a P/E cycle of 9,000 times, and will rise steadily only after passing that cycle times," Wu said. "As for 2xnm MLC, the error bits start rising sharply ever since the P/E cycle begins."
Wu noted that whether it is SLC or MLC flash, when the die node shrinks, the P/E cycle will decrease and the ECC bits rise. "For example, when SLC flash process shrinks from 5X to 2Y, the P/E cycle decreases from 100,000 times to 60,000, and the ECC bits increase from one to 40. When MLC process shrinks from 4X to 2Y, the P/E cycle decreases from 5,000 times to 3,000 and the ECC bits rise from four to 40." Wu stressed that this is proof that when the die node shrinks, the quality of the flash products becomes more unstable. The chances of losing data from error bits during read/write will increase and in turn need more bits to check and correct the data.
Wu added, "Data retention will shorten along with the shrinking of the die node." For example, 2X flash data retention is about only half of that at 5X. Moreover, when the P/E cycle increases, or when the flash is under unusually high or low temperatures, it will increase error bits and reduce data retention, shortening the product life.
According to research data, "when P/E cycle reaches 3,000 times, average error bits will increase from four to 20 and data retention will shorten from five years to one." As for the temperature factor, when the surrounding temperature exceeds 75 degrees Celsius or falls below zero, the number of error bits will increase fast and data retention will decrease. "As industrial environments often come across temperature ranges between 40 degrees Celsius below zero and 80 degrees above, it is a big challenge for MLC."
Technologies for improving MLC quality
In order to minimize the negative impact on data retention, ECC and P/E cycle during the node shrink and to avoid clients complaining about instability, data loss and reduced performance that might occur in embedded devices that have been in use for some time, InnoDisk has developed related solutions for wear-leveling, ECC engine, read shift retry, randomizer and error handling to enable MLC flash's industrial applications. These solutions improve product quality and life.
Take SATA6GHz 500MB/s SSD for example. Its native command queuing (NCQ) can accelerate data transmission between the mainframe and device, and improve the performance of the overall system. SMART (self-monitoring, analysis, and reporting technology) can monitor the SSD of the device, analyzing and reporting the reliability of all items to prevent problems from arising. As for the TRIM command, it is very helpful for improving the SSD system's performance.
Wu pointed out that the typical cell spaces for flash write and erase are different (write is smaller at 4KB, while erase is bigger at 512KB). The process of SSD's data erasure is also different from that of HDD in that a data block that has already been used must be actually wiped before data can be written in it again. If the traditional HDD method of marking related data blocks is used, it will diminish the space for writing in the SSD and reduce its overall performance. "After the operating system deletes data, the TRIM command will notify the SSD's controller chip that the specific data block can be removed. When the system is not busy, the SSD will then move the usable data from that block to the cache and erase the block. This prevents useless data occupying the flash pages."
InnoDisk Corporation RD Director, C.C Wu
Participants inquire about InnoDisk's SSD solutions