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Friday 2 October 2026
China turns to 3D packaging to push AI performance beyond front-end scaling limits
Chip-performance gains have long been driven by an industry-wide focus on shrinking transistor nodes and tightening integration. While major economies including the US and Taiwan have...
Wednesday 23 September 2026
Nexperia China turns 12-inch wafers into the backbone of its chip supply-chain reset

Nexperia China is accelerating production on its domestic 12-inch wafer platform as it rebuilds a locally controlled semiconductor supply...

Thursday 17 September 2026
Exclusive: China's CAS institute charts DUV route to 3nm GAA without EUV
China's advanced semiconductor research has reached another milestone. The Institute of Microelectronics of the Chinese Academy of Sciences has established a gate-all-around (GAA)...
Wednesday 16 September 2026
Interview: Forget transistors — speed is what's choking the chip supply chain, says Qnity exec
The global surge in AI demand is accelerating change across the semiconductor industry, and as Moore's Law scaling faces physical limits, chipmaking is no longer only about shrinking...
Tuesday 8 September 2026
Huawei Kirin 9050 Pro puts LogicFolding to the test with 55% density gain, 66% lower NPU power
Huawei's Kirin 9050 Pro is the first commercial test of its Tau Scaling Law, with the company claiming a 55% increase in transistor density at the same process node while cutting NPU,...
Monday 7 September 2026
Naura 3D DRAM etching breakthrough could give CXMT a new path beyond EUV
China's Naura Technology has demonstrated a selective etching process for 64-layer 3D DRAM structures, potentially giving domestic memory makers another route to raise transistor density...
Monday 7 September 2026
Huawei Kirin 2026 challenges 3D chip heat limits with Tau Scaling Law
Huawei is using measured data from its upcoming Kirin 2026 processor to challenge a key concern around vertically stacked logic: that higher transistor density inevitably brings more...
Thursday 3 September 2026
TRUMPF targets advanced packaging as AI chip makers chase higher density, better cooling
As AI chips grow more powerful, the race is shifting beyond transistor scaling to packaging, glass substrates, and thermal control. For global readers, that means the next gains in...
Tuesday 1 September 2026
Rising Packaging Complexity Elevates Glass in Semiconductor Manufacturing

As transistor scaling becomes more difficult and costly, advanced packaging has become one of the most important paths for extending Moore's Law. Technologies such as...

Tuesday 18 August 2026
MicroLED still lacks key LTPO TFT tech

MicroLED remains a promising next-generation display technology, but industry analysts say its commercial breakthrough still hinges...

Saturday 8 August 2026
Taiwan team builds high-performance MoS2 transistor to ease 2D semiconductor limits
Taiwan researchers announced on August 6 that they had developed a high-performance monolayer molybdenum disulfide (MoS2) top-gate transistor designed to address a long-standing interface...
Wednesday 5 August 2026
Huawei's 18-tier pagoda challenges Nvidia's chip-scaling playbook

Huawei is arguing that the next phase of semiconductor performance will depend less on transistor shrinkage and more on system architecture,...

Tuesday 21 July 2026
Huawei Kirin 9030 shows SMIC's 7nm gains and ongoing efficiency gap
A teardown of Huawei's Kirin 9030 flagship processor — built on SMIC's 7nm-class N+3 process — reveals continued density progress from China's leading chipmaker, but a...
Friday 10 July 2026
TSMC, ASML, and Imec target 2D chip mass production in Taiwan within five years

ASML, Imec and TSMC are collaborating in southern Taiwan to develop manufacturing equipment for two-dimensional (2D) semiconductor...

Monday 6 July 2026
Exclusive Interview: Dutch startup Nearfield bets on process control to rival EUV in AI chip manufacturing

As Moore's Law approaches its physical limits, simply shrinking semiconductor process nodes is no longer the sole path to improving...