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News tagged Mentor Graphics
  • Last update: Tuesday 20 October 2015 [8 news items]

Mentor Graphics Veloce VirtuaLAB adds protocols for networking designs

Oct 20, 16:59

Mentor Graphics has announced its Veloce VirtuaLAB Ethernet environment with support for 25Gb, 50Gb and 100Gb Ethernet designs. VirtuaLAB is Mentor Graphics' platform for delivering...

Globalfoundries announces design infrastructure for 14nm FinFET process

Jun 3, 12:15

In collaboration with design ecosystem partners, Globalfoundries has announced the availability of digital design flows for customers designing on its latest manufacturing technology...

Mentor Graphics unveils hypervisor for multicore processors and multi-OS consolidation

Oct 25, 10:44

Mentor Graphics has announced its new Mentor Embedded Hypervisor product for in-vehicle infotainment (IVI) systems, telematics, advanced driver assistance systems (ADAS) and instrumentation...

IPextreme announces new IP commercialization platform and partnership with Mentor Graphics

Oct 21, 22:22

IPextreme has announced a new platform for semiconductor IP trading and a partnership with Mentor Graphics to sell and deliver IPextreme's IP cores.

Globalpress Electronics Summit 2013: Mentor Graphics sees opportunities in FinFETS

Apr 17, 10:55

Mentor Graphics chairman and CEO Wally Rhines has indicated that Mentor's design for test (DFT) and physical verification tools will be what distinguishes the EDA company in the development...

Global EDA industry prospering: Q&A with Walden Rhines, chairman and CEO of Mentor Graphics

Dec 22, 11:23

The global EDA (electronic design automation) market has been growing at a rapid pace since the 2008 financial crisis, sustaining a growth rate higher than the industry's average...

Mentor chairman and CEO Walden Rhines

Mentor Graphics addresses formal verification with Questa

Oct 26, 13:34

Mentor Graphics recently announced a new formal-based technologies in the Questa Verification Platform that provide mainstream users with the ability to more easily perform exhaustive...

Globalfoundries tapes out 20nm test chip

Aug 30, 16:40

Globalfoundries has announced that it successfully taped out a 20nm test chip using flows from EDA partners Cadence Design Systems, Magma Design Automation, Mentor Graphics and Synopsys...

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