The new Wide IO Mobile RAMTM uses a 30nm manufacturing process. Sample shipments will begin in December 2011 and volume production is likely to start in 2012, the vendor said. Also, sample shipments of a four-layer 16-gigabit product are scheduled to begin in March 2012.
The newly-developed DRAM achieves a data transfer rate of 12.8 gigabytes per second (12.8 GB/s) that is four times faster than LPDDR2, the current leading DRAM preference for mobile devices. When compared with LPDDR2 based on equivalent data transfer rates, the new DRAM consumes roughly 50% less power.
Wide IO Mobile RAM has around 1200 interface pins, including 512 I/O (Input/Output) pins, to enable SoC connections. TSV technology that can stack together multiple chips in a vertical configuration is necessary to meet the demand for higher memory density.
At present Elpida is developing a 16-gigabit DRAM based on stacking four 4-gigabit Wide IO Mobile RAM chips. Compared with existing PoP products, the 16-gigabit DRAM is expected to be thinner and smaller by using TSV. The current memory package for mobile devices (SoC plus a 4-layer PoP) has a height of 1.4mm. However, Elpida's TSV technology package (SoC plus a 4-layer TSV) has a height of 1.0mm, which makes it about 30% thinner.
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